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Measuring maximum memory requirement of an application at any point through
continuous use of garbage collector
Method and apparatus are disclosed for the intensive use of garbage collection in order to determine the maximum amount of memory that is consumed by a running...
Method and apparatus for implementing timers for enterprise javabean
Methods and apparatus for implementing state machines as enterprise beans with reliable or transactional timers on an enterprise platform are disclosed....
Context based control data
A method, system, and computer program product for accessing server resources by a client communicating control data to a server. A context object is associated...
System and method for handling display device requests for display data
from a frame buffer
A graphics system may include a frame buffer, a processing device coupled to access data in the frame buffer, a frame buffer interface coupled to the frame...
Quantifying a difference between nodal voltages
A method and apparatus that uses the difference between two nodal voltages, such as a temperature-independent voltage and a temperature-dependent voltage, to...
Redundant via rule check in a multi-wide object class design layout
A redundant via design rule check is preferably performed on multi-wide object class design layouts to ensure that each connection area between two conductive...
Hierarchical watermarking of content that is distributed via a network
Content is distributed via a network. Hierarchical watermarks are embedded in the content to prevent unauthorized copying of the content. In particular, a first...
Identifying and tracking object references in a java programming
Improved techniques for identifying and tracking references to Java objects are disclosed. The techniques can be used to implement garbage collection facilities...
Method and apparatus for alleviating cell packing problems in bundled link
In a bundled link system which partitions a data packet into varying size cells, a data packet is partitioned into a stream of cells of which the last two cells...
Rasterization using two-dimensional tiles and alternating bins for improved
A system and method for rasterizing and rendering graphics data is disclosed. Vertices may be grouped to form primitives such as triangles, which are rasterized...
SSTL voltage translator with dynamic biasing
A SSTL interface voltage translator that uses dynamic biasing to translate an input signal to an output signal is provided. The voltage translator uses a first...
Radiation curable aqueous compositions for low extractable film packaging
A method for producing a low-extractable film packaging from an actinic radiation curable aqueous composition containing a water soluble compound having at least...
Modular, knock-down tanning bed
A tanning bed formed a plurality of modular components that are integrated in a knock-down fashion that allows easy shipment of tanning beds in less than...
Automatic generation of fortran 90 interfaces to fortran 77 code
In accordance with methods and systems consistent with the present invention, a system that automatically generates Fortran 90 interfaces to Fortran 77 code is...
High-speed first-in-first-out buffer
A buffer, having a first buffer input, a second buffer input, and a buffer output. The buffer is configured to store a plurality of data entries. The buffer...
Method and apparatus for presenting anonymous group names
A method and system for granting an applicant associated with a client computer in a client-server system access to a requested service without providing the...
Multiple-thread processor with single-thread interface shared among threads
A processor includes logic for tagging a thread identifier (TID) for usage with processor blocks that are not stalled. Pertinent non-stalling blocks include...
Demand-based memory-block splitting
A computer system (10) implements a memory allocator that employs a data structure (FIG. 3) to maintain an inventory of dynamically allocated memory available to...
Using a differential signal in adjusting a slice voltage for a single-ended
A system for receiving electrical signals that use a differential signal in adjusting a slice voltage for a single-ended signal. This differential signal...
Graphics system configured to parallel-process graphics data using multiple
A method and computer graphics system capable of implementing multiple pipelines for the parallel processing of graphics data. For certain data, a requirement...
Device including a resistive path to introduce an equivalent RC circuit
Structures for providing devices that include resistive paths specifically designed to provide a predetermined resistance between the bulk material of the device...
Creamy ice cream products containing soy-milk and potato as the main
components and process for producing the same
Ice creams having a creamy texture without any soybean odor like ice cream are provided by using soybean, without any use of dairy products or chemical...
Method and apparatus for application packages and delegate packages to
adopt and export standard execution...
A cascadable state machine that observes the execution state machine of multiple client applications, aggregates the multiple execution states into a single...
Timing analysis of latch-controlled digital circuits with detailed clock
In accordance with the present invention, a method, system, computer system, and computer program product for considering clock skew in designing digital systems...
Self-checking multi-threaded processor
A method and apparatus for a self-checking multi-threaded processor includes a first thread for generating a first I/O request; a second thread for generating a...
Method and apparatus for restraining connection request stream associated
with high volume burst client in a...
According to the present invention, method, apparatus, and computer readable medium for restraining a connection request stream from a burst client are...
Methods and apparatus for executing code while avoiding interference
Mechanisms and techniques operate in a computerized device to execute critical code without interference from interruptions. Critical code is registered for...
Object sampling technique for runtime observations of representative
With better knowledge of the behavior of objects in a running application, it is possible to improve execution environment decisions that affect management of...
Frameworks for accessing Java class files
Improved techniques for accessing Java class files are disclosed. The techniques provide a mechanism that will generally improve the efficiency of virtual...
Method and apparatus for sharing code containing references to non-shared
A system is described that facilitates sharing an object containing embedded references to non-shared objects, which may be located at different virtual memory...
Optical cable with indicator
Networks may include optical cables to transmit data between various devices in the network. Indicators positioned on or within optical cables may be used to...
Truly anonymous communications using supernets, with the provision of
Methods and systems consistent with the present invention provide a Supernet, a private network constructed out of components from a public-network...
Disk drive bracket
A bracket having two parallel sides and an interconnecting crosspiece is attached to a disk drive or similar peripheral with the sides of the bracket extending...
Capacitor having plates with a pattern void of conductive material and
method of making therfor
A method for constructing a capacitor having an increased equivalent series resistance (ESR) is disclosed. In one embodiment, a capacitor includes a plurality of...
Circuit board ejector mechanism including flexible coupling
An ejector mechanism (14) for a circuit board (2.sup.1) and back plane (6.sup.1), the ejector mechanism being operable to provide resiliently biased engagement...
Processor resource access control with response faking
Resource access control is provided in a manner that avoids unnecessary resource accesses where a resource is already known to be faulty. The resource can be a...
Memory access controller with response faking
A memory controller controls access to one or more memory units. The memory controller includes access control logic operable to receive a memory access request...
Multiple traps after faulty access to a resource
To provide efficient resource access control in a computer system, a trap handler for handling a trap in the event of a faulty resource access being detected is...
Bus bridge resource access controller
Resource access control is provided in a manner that avoids unnecessary resource accesses where a resource is already known to be faulty. A resource access...
Mechanism for embedding network based control systems in a local network
A secure, trusted network management function embedded within a network interface device is provided. The network interface device connects a host computer to a...
Inter-domain data transfer
The present invention provides a method and apparatus for inter-domain data transfer. The method includes mapping a memory region of a source device into a...
Method and apparatus for forwarding packet fragments
One embodiment of the present invention provides a system that facilitates forwarding fragments of a packet received from a source node to a destination node,...
System using lookup service proxy object having code and request rate for
managing rate at which client can...
Provided is a method, system, and program for enabling a client to access a service, wherein the client is capable of communicating with a server. The client...
System and method for sharing memory among multiple storage device
Each node's memory controller may be configured to send and receive messages on a dedicated memory-to-memory interconnect according to the communication protocol...
Network configuration and management for dynamic networks and methods
Methods, data structures and apparatus suitable for configuration and management of dynamic networks is disclosed. A dynamic network manager that can facilitate...
Sample cache for supersample filtering
A system and method capable of super-sampling and performing super-sample convolution are disclosed. In one embodiment, the system may comprise a graphics...
Batch processing of primitives for use with a texture accumulation buffer
A graphics system configured to apply multiple layers of texture information to batches of primitives. The graphics system collects primitives into a batch that...
Parallel read with source-clear operation
A memory interface controls read and write accesses to a memory device. The memory device includes a level-one cache, level-two cache and storage cell array. The...