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A method and apparatus for managing bandwidth in a network is described. In one embodiment, the method determines whether a request being transferred from a...
Methods and apparatus for optimizing garbage collection using separate
heaps of memory for storing local...
Methods and apparatus for executing a method to enable memory associated with objects not referenced external to the executed method to be reclaimed upon...
Protection element for an EMI reduction element
An EMI reduction element and a protection element are provided with an electrical component. The electrical component has a distal end, and the EMI reduction...
Initializing a series of video routers that employ source-synchronous
A video routing system including video routers VR(0), VR(1), . . . , VR(N.sub.R -1) coupled in a linear series. Each video router in the linear series...
Tooltips on webpages
A method and apparatus that allows a Web page designer to specify tooltips for his Web page. Tooltips are text areas that display automatically when the user...
Signature analysis registers for testing a computer graphics system
A signature capture and analysis system suitable for use in a high performance computer graphics system is described. The system employs a distributed network of...
Memory interleaving technique for texture mapping in a graphics system
A graphics system and method for storing and accessing texture maps comprising texels. The graphics system may include a graphics processor and a texture memory...
Reading or writing a non-super sampled image into a super sampled buffer
A graphics system and method for storing pixel values into or reading pixel values from a sample buffer, wherein the sample buffer is configured to store a...
Jitter estimation for a phase locked loop
A method for estimating jitter in a phase locked loop is provided. The estimation is determined from a simulation that uses a representative power supply...
Dividing and distributing the drive strength of a single clock buffer
Devices, methods, and networks that divide and proportionally distribute the drive strength of a clock buffer such that the output drive strength of the clock...
Centrifugal blower with eddy blade
A centrifugal blower with an eddy blade is disclosed. The centrifugal blower includes a multiblade impeller with a plurality of blades, and a scroll casing...
Correction of spacing violations between dummy geometries and wide class
objects of design geometries
Automated techniques to correct certain rule violations with respect to non-design geometries are used, simplifying and automating the design layout of an...
Built-in self-testing for double data rate input/output
Macro cells for a Double Data Rate (DDR) I/O interface are provided. The macro cells feature built-in self-test (BIST) functionality for testing the I/O...
Method and apparatus for detecting corrupt software code
A method for detecting corrupt software code includes defining a correlation rule for a program, writing the program to a memory device and reading two or more...
Techniques for securing data flow in internet multicasting
Multicast communications are expanded to include the concept of private multicasts. An address space dedicated to multicast is partitioned into a subspace for...
Processing architecture having field swapping capability
According to the invention, a processing core that includes a first source register, a second source register, a multiplexer, a destination register, and an...
Hot swappable electronic module with non-staggered connectors
A hot swappable electronic component or module is provided that has non-staggered connectors (i.e., of equal length or depth), but which is configured to ensure...
Method and apparatus for database query decomposition
An improved system for database query processing by means of "query decomposition" intercepts database queries prior to processing by a database management...
Spanning tree support in a high performance network device
A method and apparatus for providing spanning tree support are provided. According to one aspect of the present invention, a network device includes two or more...
Data management to enable video rate anti-aliasing convolution
A system and method is disclosed for management of sample data to enable video rate anti-aliasing convolution. Sample data may be moved simultaneously from a...
Vertex assembly buffer and primitive launch buffer
A graphics system and method for processing geometry compressed, three-dimensional graphics data are disclosed. After transforming and lighting each vertex, a...
Clock frequency multiplier
A clock frequency multiplier design is provided. The clock frequency multiplier includes an input stage arranged to receive an input clock signal, a first clock...
Design-for-test technique for a delay locked loop
A delay locked loop implementing design-for-test features to test for, among other, stuck-at-faults is provided. The delay locked loop uses multiplexers as...
Water-based intaglio printing ink
The invention relates to a water-based intaglio printing ink especially suited for the intaglio printing of security documents, such as postage stamps, stock...
On-die thermal monitoring technique
A method and apparatus for monitoring a temperature on an integrated circuit that includes a thin gate oxide transistor. A temperature monitoring system that...
Filler gauge with flexible measurement
A filler gauge with flexible measurement is disclosed in the invention. The invention provides a filler gauge that is easy to be manufactured and able to lower...
Combination padlock with horizontal locking bar
System for performing deadlock free message transfer in cyclic multi-hop
digital computer network using a...
In brief summary, the invention provides a new message packet transfer system, which may be used in, for example, a multiprocessor computer system. The message...
Abstract syntax notation to interface definition language converter
framework for network management
A system and method for managing network devices. The framework may provide a suitable system for managed object data type conversions between various data...
Active region management techniques and associated methods of designing and
manufacturing VLSI circuits
Disclosed herein is a method of determining an active region for a routing area having a plurality of component tiles positioned thereon. A set of stop points,...
System and method for efficient data mirroring in a pair of storage devices
A system may include mirroring logic, a controller, and first and second devices (e.g., data storage devices). The first and second devices may include multiple...
Method and apparatus for implementing PCI DMA speculative prefetching in a
message passing queue oriented bus...
Speculative prefetching during DMA reads in a message-passing, queue-oriented bus system is controlled by creating a special data structure, called a "DMA...
Teamware server working over HTTP/HTTPS connections
A system for remotely accessing a resource in a network having a client-side and a server-side includes a server application having at least one server object...
System and method for automatically partitioning an application between a
web server and an application server
A system and method for automatically partitioning application components of a web application between a web server and an application server. Both the web...
Method and apparatus for performing fused instructions by determining
A method of executing a fused instruction is disclosed. The method begins by performing several actions, which may be performed serially or in parallel. These...
Tunable broadcast/point-to-point packet arbitration
One embodiment of the present invention provides a system that facilitates packet communication between a device within a computing system and one or more...
Automatic generation and validation of memory test models
Methods and systems for automated memory test modeling generation and validation are provided. Information supplied by a graphical user interface is used to...
A computer system comprises a host processor, a temperature sensor for sensing temperature in an enclosure of the system and one or more fans for cooling the...
System and method for prefetching data from a frame buffer
A graphics system may include a frame buffer that includes several sets of one or more memory banks and a cache. The frame buffer may load data from one of the...
Performance texture mapping by combining requests for image data
An optimizing unit for use with an interleaved memory and suitable for use in a computer graphics system is described. The unit utilizes knowledge of the...
Negative bias temperature instability correction technique for delay locked
loop and phase locked loop bias...
A bias generator adjustment system adjusts a PLL or DLL bias generator dependent on negative bias temperature instability effects in an integrated circuit. The...
Variation reduction technique for charge pump transistor aging
A charge pump is arranged to generate a current dependent on a phase difference between a first signal and a second signal. A reference circuit is operatively...
Method and apparatus for electronically aligning capacitively coupled chip
One embodiment of the present invention provides a system that electronically aligns pads on different semiconductor chips to facilitate communication between...
Golf bag with integral V-block
Method and apparatus for isolating the root of indeterminate logic values
in an HDL simulation
A technique for simulating and verifying an integrated circuit design are disclosed. Generally speaking, the technique includes storing a unique identifier for...
Replacement algorithm for a replicated fully associative translation
A method and apparatus determines whether there is an invalid address translation entry in a first translation look-aside buffer. If there is an invalid address...
Increasing power supply noise rejection using linear voltage regulators in
an on-chip temperature sensor
An apparatus that uses a linear voltage regulator to reject power supply noise in a temperature sensor is provided. Further, a method for using a linear voltage...
Apparatus and method for providing a cyclic buffer using logical blocks
An apparatus and method for creating and maintaining a cyclic or circular buffer are implemented using logical blocks corresponding to the physical blocks of the...