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Patent # Description
US-6,885,384 Method of creating a larger 2-D sample location pattern from a smaller one by means of X, Y address permutation
A system and method are disclosed for reproducing a pre-selected larger 2-D sample location pattern from a smaller one by means of X,Y address permutation. This...
US-6,885,375 Stalling pipelines in large designs
A method and a system for stalling large pipelined designs. A computational pipeline may comprise a first module and a second module coupled together. The first...
US-6,885,361 Tactile feedback mechanism for a data processing system
An apparatus for providing a tactile stimulus to a part of the body of a physical operator when a virtual operator, created by movements of the physical...
US-6,883,716 Secure photo carrying identification device, as well as means and method for authenticating such an...
Means and a method for authenticating a photographic image (3) on an identification device (1), the identification device (1) being provided with: a photographic...
US-6,883,355 High security combination padlock with locking bar
By forming a combination padlock from heavy duty metal throughout with an enlarged, heavy duty locking bar or shackle being employed having a tamper-proof...
US-D504,531 Rechargeable light
US-D504,425 Computer housing
US-6,883,163 Populating resource-constrained devices with content verified using API definitions
Remote incremental program verification may be achieved by receiving content verified by at least one content provider, installing the content on a...
US-6,883,162 Annotations for transaction tracing
A method and mechanism for annotating a transaction stream. A processing unit is configured to generate annotation transactions which are inserted into a...
US-6,883,149 Via enclosure rule check in a multi-wide object class design layout
In a multi-wide class design layout, design rule checks for enclosure of multi wide class objects prevent false errors or false passes by performing such checks...
US-6,883,131 XOR processing incorporating error correction code data protection
A method for operating a data processing system is provided. The method includes receiving a plurality of data segments, and for each of the plurality of data...
US-6,883,108 Fault-tolerant routing scheme for a multi-path interconnection fabric in a storage network
Embodiments of a routing system are disclosed, including a method for routing a plurality of communications in a storage system. The storage system may include a...
US-6,883,100 Method and system for dynamic issuance of group certificates
In accordance with the invention, on-line group servers issue group membership or group non-membership certificates upon request. Furthermore, when a requester...
US-6,883,074 System and method for efficient write operations for repeated snapshots by copying-on-write to most recent snapshot
An embodiment of the invention provides a method for improving efficiency in a system containing repeated snapshots of an original data store. A READ/WRITE...
US-6,883,068 Methods and apparatus for implementing a chche replacement scheme
Methods and systems are provided for processing a cache. A candidate object is identified for updating. A fresh object corresponding to the candidate object is...
US-6,883,010 Facilitating failover to a secondary file server in a highly available file system
One embodiment of the present invention provides a system for elevating a secondary file server to act as a new primary file server in a highly available file...
US-6,883,006 Additions on circular singly linked lists
During a scan operation in a circular, singly linked list having a number of list entries each of which has an associated next pointer field and a root pointer...
US-6,882,649 Least choice first arbiter
In a system with multiple requesters making multiple requests for resources, an arbiter prioritizes requests based on the number of requests made by a requester....
US-6,882,645 Apparatus and method for sequencing memory operations in an asynchronous switch fabric
One embodiment of the present invention provides a system that facilitates implementing a memory mechanism within an asynchronous switch fabric. The system...
US-6,882,530 Integrated component rack and AC power distribution
A network system and computer component device rack having an integrated AC power distribution system is provided. The device rack and power distribution system...
US-6,882,354 Scroll bars with user feedback
A graphical user interface uses scroll bars having a single pixel width and a much larger scroll button or thumb. Both the scroll bar and the scroll button may...
US-6,882,196 Duty cycle corrector
A device that uses an input clock signal to generate an output clock signal with a desired frequency is provided. The device uses a voltage controlled delay...
US-6,881,078 Interconnecting device that allows for connections in small space
An adapter for an interconnecting device. The adapter comprises a backboard having a first end and a second end. A connector having first conductive elements is...
US-6,880,970 Method and apparatus for isolating an ambient air temperature sensor
A method and apparatus for thermally isolating a temperature sensor mounted on a printed circuit board from a heat generating component mounted on the printed...
US-6,880,964 Chain-controlled lamp stand with multi-stage light modulation
A chain controlled lamp stand with multi-stage light modulation includes a control device to modulate brightness of a lamp. The control device consists of a...
US-6,880,155 Token-based linking
A system links architecture neutral code downloaded to a resource constrained computer. The code may be separated into one or more packages having one or more...
US-6,880,144 High speed low power bitline
A circuit for controlling a bitline during a memory access operation is provided. The circuit includes a plurality of sub-arrays with each sub-array having a...
US-6,880,139 Electromigration risk analysis in integrated circuit power interconnect systems using pseudo dynamic simulation
Methods of and apparatuses for performing electromigration risk analyses of power interconnect systems in integrated circuits employ a pseudo dynamic simulation...
US-6,880,120 Sequence-based verification method and system
A hardware verification method includes obtaining a set of packets to be driven by a device under test and obtaining a set of timing and relation criteria which...
US-6,880,118 System and method for testing operational transmissions of an integrated circuit
A source synchronous test methodology and apparatus. In one embodiment, an integrated circuit (IC) configured for source synchronous I/O transactions may be a...
US-6,880,071 Selective signalling of later reserve location memory fault in compound compare and swap
A sequentially performed implementation of a compound compare-and-swap (nCAS) operation has been developed. In one implementation, a double compare-and-swap...
US-6,880,060 Method for storing metadata in a physical sector
A method for embedding integrity metadata. In one exemplary embodiment, a plurality of integrity metadata segments is determined. Each integrity metadata segment...
US-6,880,057 Split write data processing mechanism for memory controllers utilizing inactive periods during write data...
A memory controller provides fast processing of sequential split memory access instructions which include a split write instruction. In a split write...
US-6,880,028 Dynamic request priority arbitration
A system and method are provided for dynamically determining the priority of requests for access to a resource taking into account changes in the access needs of...
US-6,879,995 Application server message logging
System and method for performing message logging for networked applications running on application servers. The application server may run a process referred to...
US-6,879,929 Sense amplifier thermal correction scheme
A system and method of adjusting a sense amplifier includes providing an amplification control parameter to the sense amplifier. A temperature of the sense...
US-6,879,328 Support of multi-layer transparency
A system and method for generating graphics images from 3-dimensional graphics data representing one or more transparent objects and one or more opaque objects...
US-6,878,874 Electronics assembly
A chassis for an electronic system. The chassis includes a recess therein for housing a plurality of cooling fans that are arranged in series and can be removed...
US-6,877,264 Universal snap-in-place customer label plate
A label holder for labeling a rack-mounted computer system component is provided. The label holder includes an elongated body, a plurality of legs, and at least...
US-6,877,204 Riveting method
A method of joining a plurality of sheets by means of a blind rivet, comprises: (i) forming holes in the sheets and placing the sheets together so that the ...
US-D503,932 Radio
US-6,877,163 Method and system for dynamic proxy classes
In an object-oriented data processing system, methods and systems in accordance with the present invention provide a proxy class dynamically generated at runtime...
US-6,877,111 Method and apparatus for managing replicated and migration capable session state for a Java platform
An invention is disclosed managing the replicated and migration capable state for an enterprise Java bean (EJB) application. The invention includes executing a...
US-6,877,108 Method and apparatus for providing error isolation in a multi-domain computer system
A method and apparatus for providing error isolation in a multi-domain computer system. The system includes a plurality of system resources allocated to form at...
US-6,877,098 System and method for directing access from a framebuffer to a virtual framebuffer when the framebuffer is...
Methods and apparatus for managing power of a computer system. Access to a device by a process that accesses the device but does not require user interaction to...
US-6,877,094 Method and apparatus for authentication and payment for devices participating in Jini communities
Architectures that enable different types of security devices to operate interchangeably in very large network environments for authentication and metered access...
US-6,877,088 Methods and apparatus for controlling speculative execution of instructions based on a multiaccess memory condition
Mechanisms and techniques operate in a computerized device to enable or disable speculative execution of instructions such as reordering of load and store...
US-6,877,077 Memory controller and method using read and write queues and an ordering queue for dispatching read and write...
In one of the many embodiments disclosed herein, a method for dispatching read and write requests to a memory is disclosed which includes queuing at least one...
US-6,877,056 System with arbitration scheme supporting virtual address networks and having split ownership and access right...
A computer system may include several client devices, a data network configured to transmit data packets between the client devices, a coherency mode storage...
US-6,877,055 Method and apparatus for efficiently broadcasting transactions between a first address repeater and a second...
A computer system including a first repeater and a second repeater that is coupled to the first repeater. The computer system also includes a third repeater that...
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