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Patent # Description
US-6,986,130 Methods and apparatus for compiling computer programs using partial function inlining
A method and system makes inlining decisions that are efficient for subprograms that have significantly varying execution times over a range of variables or...
US-6,986,129 System and method for java preprocessor
A Java preprocessor method is provided. A Java template file is received that includes Java programming language code and meta code. The Java template is then...
US-6,986,126 Method and apparatus for detecting violations of type rules in a computer program
One embodiment of the present invention provides a system that detects violations of type rules in a computer program. The system operates by locating a type...
US-6,986,124 Debugger protocol generator
A method for automatically generating front-end code and back-end code that are both compatible with a specification, such as the JDWP communication protocol....
US-6,985,984 Multiprocessing systems employing hierarchical back-off locks
A multiprocessing system including multiple processing nodes employs various implementations of hierarchical back-off locks. A thread attempting to obtain a...
US-6,985,956 Switching system
Methods and systems consistent with certain aspects related to the present invention provide a digital network having a plurality of data storage elements, at...
US-6,985,820 Conductor arrangement for reduced noise differential signalling
A method for analyzing input output (I/O) pin arrangements to determine the effect of differential pair and power and ground pin placement on signal quality...
US-6,985,153 Sample request mechanism for supplying a filtering engine
A graphics system comprising a scheduling network, a sample buffer and a plurality of filtering units. The sample buffer is configured to store sample generated...
US-6,985,150 Accelerator control unit configured to manage multiple hardware contexts
A control unit for a graphics accelerator. The control unit includes a plurality of processing pipelines, a memory (configured to store an allocation table) and...
US-6,983,465 Method and apparatus for managing data caching in a distributed computer system
A three-tiered data caching system is used on a distributed computer system comprising hosts connected by a network. The lowest tier comprises management facade...
US-6,983,455 Mechanism for profiling computer code
A set of computer code is profiled by breaking each code segment of the computer code down into basic instructions. Thereafter, the set of computer code is...
US-6,983,437 Timing verification, automated multicycle generation and verification
A method for generating consistent functional and timing definitions. The method includes providing a common source description, the common source description...
US-6,983,400 Distributed test harness model
A system and method for remotely testing an application includes providing a harness server and providing a first harness client. The first harness client is in...
US-6,983,399 System and method for ascertaining public application program interface coverage
An invention is provided for a computer program embodied on a computer readable medium for ascertaining public API coverage for a J2EE application. The computer...
US-6,983,343 Partitioning of storage channels using programmable switches
A data storage system having a first storage channel, a first controller coupled to the first storage channel, a first storage device coupled to the first...
US-6,983,285 Apparatus and method for dynamically verifying information in a distributed system
Use of a policy object for verification in a distributed system. A machine downloads a policy object containing a reference to code governing verification of...
US-6,983,283 Managing scene graph memory using data staging
A system and method that manages scene graphs by data staging is contemplated. Data staging entails selectively loading only the portions of the scene graph that...
US-6,983,234 System and method for validating processor performance and functionality
A method and system for accurately validating performance and functionality of a processor in a timely manner is provided. First, a program is executed on a high...
US-6,982,719 Switching sample buffer context in response to sample requests for real-time sample filtering and video generation
A graphics system configured with a scheduling network, a sample buffer, a rendering engine and a filtering engine. The rendering engine is configured to...
US-6,981,246 Method and apparatus for automatic accessibility assessment
The present invention provides a method and apparatus for automatic accessibility assessment. One embodiment of the present invention automatically executes and...
US-6,981,245 Populating binary compatible resource-constrained devices with content verified using API definitions
Remote incremental program verification may be achieved by receiving content verified by at least one content provider, installing the content on a...
US-6,981,191 ASIC logic BIST employing registers seeded with differing primitive polynomials
A method and apparatus for performing a built-in self-test ("BIST") on an integrated circuit device are disclosed. A BIST controller comprises a logic built-in...
US-6,981,172 Protection for memory modification tracking
A dirty memory is operable to store dirty indicators, each dirty indicator being settable to a given value indicative that a page of memory associated therewith...
US-6,981,171 Data storage array employing block verification information to invoke initialization procedures
A data storage array employing block verification information to invoke initialization procedures. In one embodiment, a data storage subsystem includes a...
US-6,981,169 Modified glitch latch for use with power saving dynamic register file structures
In the Retirement Payload Array (RPA) of a microprocessor, the signal "READ" is logically combined with the primary clock signal "CLK" in a control circuit of a...
US-6,981,099 Smart-prefetch
A method and system for the smart prefetching of instructions is disclosed. The method includes computing an effective memory latency of a request for data and...
US-6,980,998 Method and apparatus for merging data graphs using data identity control
A method for merging a first object graph with a second object graph, including packaging the first object graph into an internal representation, wherein the...
US-6,980,979 Method and apparatus for customizing Java API implementations
A method and system is provided for customizing Java API implementations. A plurality of class files is obtained, wherein the class files are capable of being...
US-6,980,916 Mechanism for graphical test exclusion
Methods and systems for administratively qualifying and disqualifying test programs of a suite as excludable from performance by a client are disclosed in...
US-6,980,427 Removable media
A server blade may comprise a processor. The server blade may additionally comprise a removable media interface device. The server blade can be configured as a...
US-6,978,461 System and method for accessing functionality of a backend system from an application server
A system and method for automatically creating information useable to access functionality of a backend computer system coupled to an application server. The...
US-6,978,456 Methods and apparatus for numeric constant value inlining in virtual machines
Improved frameworks for loading and execution of portable, platform independent programming instructions within a virtual machine are disclosed. The improved...
US-6,978,448 Method and apparatus for rewriting bytecodes to minimize runtime checks
Methods and apparatus for reducing the number of runtime checks performed during the execution of a virtual machine. According to one aspect of the present...
US-6,978,441 Rating apparatus and method for evaluating bugs
A method of rating a bug, including reporting the bug to a business entity by an interested party, entering information regarding the bug into a database,...
US-6,978,401 Software application test coverage analyzer
A method for analyzing test coverage of a software application is provided. The method includes profiling an executable of the software application to generate...
US-6,978,353 Low overhead snapshot in a storage array using a tree-of-slabs metadata
A method for creating a point-in-time copy of a data store. A command to create a point-in-time copy of an original data store is received. The processing of...
US-6,977,929 Method and system for facilitating relocation of devices on a network
Methods and systems consistent with the present invention provide a Supernet, a private network constructed out of components from a public-network...
US-6,977,693 Networked video projector apparatus and method of projecting a video frame on a video projector
A video projector including a network adapter, a microprocessor physically and electrically coupled to the network adapter, a graphics adapter physically and...
US-6,977,530 Pulse shaper circuit for sense amplifier enable driver
A sense amplifier pulse shaping circuit maintains a relationship between a sense amplifier enable signal and a sense amplifier equalization enable signal while...
US-D513,033 Eyeglass frame
US-6,976,268 Methods and apparatus for efficiently accessing periodically broadcast data
The invention relates to methods and apparatus for accessing data that is periodically transmitted by a broadcaster. In accordance with one aspect of the...
US-6,976,262 Web-based enterprise management with multiple repository capability
A transport neutral technique allows an object manager to communicate with a CIM repository using any of a variety of protocols. The object manager software is...
US-6,976,261 Method and apparatus for fast, local CORBA object references
Methods and apparatus for reducing computing overhead by creating fast, local-only objects in a distributed client/server based computing system are disclosed....
US-6,976,235 Region-based voltage drop budgets for low-power design
A method and apparatus for assigning a set of region-based voltage drop budgets to an integrated circuit is provided. Further, a method for partitioning an...
US-6,976,194 Memory/Transmission medium failure handling controller and method
A memory controller may include a check bit encoder circuit and a check/correct circuit. The check bit encoder circuit is coupled to receive a data block to be...
US-6,976,125 Method and apparatus for predicting hot spots in cache memories
One embodiment of the present invention provides a system for predicting hot spots in a cache memory. Upon receiving a memory operation at the cache, the system...
US-6,976,113 Supporting non-hotswap 64-bit CPCI cards in a HA system
The present invention provides for systems and apparatus that support non-hotswappable (non-HA) 64-bit Compact Peripheral Component Interconnect (CPCI) cards so...
US-6,976,065 Mechanism for reconfiguring a server without incurring server down time
A mechanism for reconfiguring a server without incurring any server down time is disclosed. At startup time, a server constructs a set of configuration data...
US-6,976,061 Resource adapter and XML descriptor for use in a client server environment utilizing an enterprise information...
A resource adapter for use in client server computer configurations utilizing enterprise information systems is disclosed. The file format defines the contract...
US-6,976,050 System and method for extracting the high part of a floating point operand
A method and system determine a high part of a floating point operand. Exponent field bits and fraction field bits of a result are set to a zero if the...
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