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Patent # Description
US-6,895,524 Circuit reduction technique for improving clock net analysis performance
A method for reducing a transistor circuit netlist for clock network timing verification is provided. Further, a simulation tool that reduces a transistor...
US-6,895,458 Opcode to turn around a bi-directional bus
A system for managing the control of a bi-directional data bus between a master unit and a slave unit. The master couples to the slave through a request opcode...
US-6,895,422 Method and apparatus for computing roots of a polynomial equation with interval coefficients
One embodiment of the present invention provides a system for finding the roots of a polynomial or a quadratic equation with interval coefficients. The system...
US-6,895,401 Method and apparatus of performing active update notification
A method and apparatus of performing active update notification. Components of an application are able to specify interest in a data object or set of data...
US-6,894,895 Expansion card cage stabilizer
An expansion enclosure allows additional expansion cards to be used with a computer system. The enclosure exhibits a small footprint (e.g., one rack unit, or...
US-6,894,698 Recovering added precision from L-bit samples by dithering the samples prior to an averaging computation
A dithering system comprising a dithering unit, a storage medium, and an averaging unit. The dithering unit is configured to receive a set of data values, to add...
US-6,894,528 Process monitor based keeper scheme for dynamic circuits
An invention is disclosed for a process monitor based keeper scheme for dynamic circuits. A semiconductor die having a process monitor based keeper scheme of the...
US-6,894,513 Multipoint plane measurement probe and methods of characterization and manufacturing using same
The present application describes a method and an apparatus for characterizing a conductive plane using multipoint measurement. In an embodiment of the present...
US-6,894,230 Printed circuit board employing lossy power distribution network to reduce power plane resonances
An interconnecting apparatus employing a lossy power distribution network to reduce power plane resonances. In one embodiment, a printed circuit board includes a...
US-6,893,154 Integrated temperature sensor
An apparatus and method are provided for sensing a physical stimulus of an integrated circuit. The apparatus and method allow for accurate die temperature...
US-6,892,801 Thermal control apparatus for electronic systems
A thermal control apparatus using heat pipes. The thermal control apparatus includes a heat pipe having a hollow interior at least partially filled with a...
US-6,892,382 Method and apparatus for implementing deployment descriptors in an enterprise environment
Methods and apparatus for implementing deployment descriptors which are used to deploy modules in an enterprise environment are disclosed. According to one...
US-6,892,379 Methods and apparatus for use in aiding stack unwinding
In a compiler, a method of generating assembly code for stack unwinding is disclosed. One or more source code lines are obtained. Assembly code for the one or...
US-6,892,368 Patching technique for correction of minimum area and jog design rule violations
Automated patching techniques to correct certain rule violations are used, simplifying and automating the design layout of an electronic circuit, whether...
US-6,892,363 Correction of width violations of dummy geometries
Automated techniques to correct certain rule violations with respect to non-design geometries are used, simplifying and automating the design layout of an...
US-6,892,360 Focus traversal mechanism for graphical user interface widgets
Selectively determining a particular graphical user interface widget to receive focus based upon user-entered directional information. When a user enters...
US-6,892,320 Method and apparatus for providing multiple-version support for highly available objects
One embodiment of the present invention provides a system that supports multiple versions of highly available objects. A highly available object is a primary...
US-6,892,307 Single sign-on framework with trust-level mapping to authentication requirements
A security architecture has been developed in which a single sign-on is provided for multiple information resources. Rather than specifying a single...
US-6,892,295 Processing architecture having an array bounds check capability
According to the invention, a method for processing data related to an array of elements is disclosed. In one embodiment, a method for processing data related to...
US-6,892,286 Shared memory multiprocessor memory model verification system and method
A system and method for verifying a memory consistency model for a shared memory multiprocessor computer systems generates random instructions to run on the...
US-6,892,278 Method and apparatus for efficiently implementing a last-in first-out buffer
One embodiment of the present invention provides a system that implements a last-in first-out buffer. The system includes a plurality of cells arranged in a...
US-6,892,263 System and method for hot swapping daughtercards in high availability computer systems
A system and method for hot swapping daughtercards in high availability computer systems. In one embodiment, a high availability computer system includes a...
US-6,892,202 Optimistic transaction compiler
A method for updating Enterprise JavaBeans (EJB) classes is provided. Each EJB class is managed by an application server which maintains a database of active EJB...
US-6,892,159 Method and system for storing field replaceable unit operational history information
A method for tracking repair histories includes providing a field replaceable unit having a memory device. Operational history data is collected during the...
US-6,892,049 Method and system for selecting training materials
A system and method for selecting training materials is provided. In an aspect of the invention, a system is provided that includes a skill requirements database...
US-6,891,804 Method and apparatus for desirable network components
The present invention provides a method and apparatus for desirable network components. One embodiment selects connection components for use in network...
US-6,891,403 On-chip PLL locked frequency determination method and system
The locked frequency of a PLL is used to latch a test signal through various latching devices (flip-flops or the like). Various different delays are selectively...
US-6,890,184 Electrical connector for conveying signals between two circuit boards
An electrical connector for conveying signals between two circuit boards includes a first connector portion including a first array of board contacts for...
US-6,890,117 Writing pen that calculates body mass index
A writing instrument that includes tables and operational elements for calculating the Body Mass Index (BMI) of a person. In general, the BMI of a person is...
US-6,889,473 Firefighter training building having a reconfigurable floor plan
A firefighter training building having a system of movable and removable partition walls for changing the interior floor plan layout of the building is...
US-D504,895 Computer housing
US-D504,882 Radio
US-6,889,343 Method and apparatus for verifying consistency between a first address repeater and a second address repeater
In a computer system having a first repeater and a second repeater, the first repeater coupled to the second repeater by a bus, the first repeater operable to...
US-6,889,329 Adding secure external virtual memory to smart cards
The Smart Card URL Programming interface (UPI) builds a local web or card server around a card terminal and the inserted smart card. This server can also support...
US-6,889,297 Methods and systems for eliminating data redundancies
Methods, systems, and articles of manufacture consistent with the present invention eliminate data redundancies. A first data block identifier is obtained for a...
US-6,889,277 System and method for dynamically tuning interrupt coalescing parameters
A system and method for dynamically tuning the interrupt coalescing behavior of a communication interface to suit the workload of the interface. An interrupt...
US-6,889,248 Automatically configuring a server into a master or slave server based on its relative position in a server network
A server network is described. In one embodiment, the server network comprises a global master server, a local master server and one or more slave servers. The...
US-6,889,227 Database access bridge system and process
A system or method enables a two tier computer application to operate in a three tier computer environment without specific programming for the three tier...
US-6,888,785 Fault tolerance mechanism for a storage device that stores data in stacks within an integral storage medium
In one embodiment, a storage device includes a controller, an integral storage medium that includes one or more stacks, where each stack includes multiple...
US-6,888,720 Distributed graphitic foam heat exchanger system
A system for cooling at least two electronic components comprises a plurality of graphitic foam products which are each thermally coupled to a corresponding...
US-6,888,506 Plate type antenna with dual channels
A plate type antenna for a small size mobile wireless communication device can be simultaneously to fit two different channels of 5.4 GH.sub.Z and 2.4 GH.sub.Z...
US-6,886,798 Support for electronics assembly
A support for holding an electronics assembly, comprises: (i) a rigid frame (6) that can be secured to the assembly; (ii) one or more cushioning elements (8) for...
US-6,886,378 Container locking system
A system for locking cargo containers. The container locking system comprises a lock housing comprising a box, a lock bar housing disposed behind the lock...
US-6,886,157 Method and apparatus for creating efficient native methods that extend a bytecode interpreter
Methods, apparatus and computer program products are disclosed for a method of invoking a native method in a Java virtual machine ("JVM"). A special-purpose fast...
US-6,886,145 Reducing verification time for integrated circuit design including scan circuits
A testbench for an integrated circuit (IC) design including a chain of scan circuits having a memory characteristic is verified by: (a) dividing the chain of...
US-6,886,108 Threshold adjustment following forced failure of storage device
A storage device is monitored for data integrity errors and each detected data integrity error is stored in a count. When that count reaches a threshold limit,...
US-6,886,081 Method and tool for determining ownership of a multiple owner lock in multithreading environments
A method for determining an ownership of for a multiple owner lock. The method includes determining potential owners of the lock by inspecting a core file of a...
US-6,886,053 Method, system, and program for managing access to a device
Provided are a method, system, and program for selecting a path to a device to use when sending data requests to the device. Data requests are submitted to the...
US-6,886,031 Efficient connection and memory management for message passing on a single SMP or a cluster of SMPs
A method for efficient connection establishment and use for message passing on a single symmetric multiprocessor node or on a cluster of symmetric multiprocessor...
US-6,885,610 Programmable delay for self-timed-margin
A system and method for adjusting the clock delay in a self-timed memory system having a memory array and a sense amplifier includes a programmable delay circuit...
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