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Patent # Description
US-7,055,129 Method and apparatus for metrics approval mechanism
A method of modifying a metrics feedback icon for a software component involves displaying the metrics feedback icon for the software component, generating a...
US-7,055,118 Scan chain verification using symbolic simulation
A method and apparatus for improved formal scan chain equivalence checking to verify the operation of components in a VLSI integrated circuit is described in...
US-7,055,026 Method and system for a portable adaptable operating environment identity
A method and system for implementing a transportable operating system boot environment on a computer system. The method includes the step of accessing a stored...
US-7,055,021 Out-of-order processor that reduces mis-speculation using a replay scoreboard
A pipelined processor includes a dependency scoreboard that tracks dependency for replay of instructions capable of executing out-of-order. Early instructions...
US-7,055,020 Flushable free register list having selected pointers moving in unison
A method and apparatus is provided for restoring a free physical register list to its previous state without having to physically restore any data. The method...
US-7,055,016 Computer system including a memory controller configured to perform pre-fetch operations
A computer system including a memory controller configured to perform pre-fetch operations. A computer system includes a first system memory, a second system...
US-7,054,905 Replacing an email attachment with an address specifying where the attachment is stored
One embodiment of the present invention provides a system that replaces an attachment to an email message with a reference to a location where the attachment is...
US-7,054,898 Elimination of end-around-carry critical path in floating point add/subtract execution unit
A processor having a floating point execution unit with improved parallelism in the adder (add/subtract) unit is disclosed. A preferred aspect of the invention...
US-7,054,890 Method and apparatus for managing data imaging in a distributed computer system
A three-tiered data imaging system is used on a distributed computer system comprising hosts connected by a network. The lowest tier comprises management facade...
US-7,054,881 Method and system for reporting standardized and verified data
A system for generating profiled test execution data using a plurality of test suite output files is provided. The system includes a plurality of test suites and...
US-7,054,874 Modeling overlapping of memory references in a queueing system model
One embodiment of the present invention provides a system that facilitates modeling the effects of overlapping of memory references in a queueing system model....
US-7,054,853 Methods and system for efficient association traversals
Methods and systems are provided for performing efficient association traversal operations in a Common Information Model (CIM) implemented environment. A CIM...
US-7,054,787 Embedded integrated circuit aging sensor system
A method and apparatus for sensing an aging effect on an integrated circuit using a sensor disposed on the integrated circuit and arranged to generate an output...
US-7,053,677 Input/output device having linearized output response
Disclosed is an input/output (IO) device for transmitting an input data bit signal. In one embodiment, the IO device includes an IO device input node for...
US-7,051,343 Module-by-module verification
A method, computer program, signal transmission and apparatus pre-verify instructions in a module of a computer program one module-at-a-time. First it is...
US-7,051,337 Method and apparatus for polling multiple sockets with a single thread and handling events received at the...
A method and apparatus are provided for handling events received at a media streaming server. Server sockets configured to receive events are divided into...
US-7,051,323 Method and apparatus for initializing romized system classes at virtual machine build time
One embodiment of the present invention provides a system that initializes system classes for a virtual machine during build time for the virtual machine, so...
US-7,051,305 Delay estimation using edge specific miller capacitances
A method of estimating delay which includes configuring a first signal path and second signal path such that the first signal path is a victim signal path and...
US-7,051,304 Distributed infiniband verification protocol
A verification process comprises a verification environment having a hardware development language interface. The verification process also comprises a device...
US-7,051,303 Method and apparatus for detection and isolation during large scale circuit verification
A method for providing verification for a simulation design involves analyzing a simulation design using a testbench comprising a rapid bug detection tool, and...
US-7,051,252 Ibist identification loopback scheme
A method and mechanism for testing communication links. A transmitter contact, or transmission point, is assigned a unique identifier. During a given test, the...
US-7,051,243 Rules-based configuration problem detection
A system and method for identifying problems with a system configuration may evaluate system configuration information against one or more configuration...
US-7,051,235 Clock distribution architecture having clock and power failure protection
A clock distribution architecture having clock and power failure protection is disclosed. In one embodiment, a computer system includes a plurality of client...
US-7,051,224 Method and apparatus for configuring a clock timing feedback path
The present invention provides a method and apparatus for configuring a timing feedback path in a semiconductor device. The apparatus includes an oscillator...
US-7,051,192 Facilitating value prediction to support speculative program execution
One embodiment of the present invention provides a system that predicts a result produced by a section of code in order to support speculative program execution....
US-7,051,184 Method and apparatus for mapping memory addresses to corresponding cache entries
One embodiment of the present invention provides a system for mapping memory addresses to cache entries. The system operates by first receiving a memory request...
US-7,051,155 Method and system for striping data to accommodate integrity metadata
A data layout mechanism is described for allocating metadata within a storage system employing data striping. The data layout mechanism includes a number of...
US-7,051,067 Object oriented mechanism for dynamically constructing customized implementations to enforce restrictions
An object oriented mechanism for dynamically constructing service implementations to enforce restrictions on services provided to an application is disclosed....
US-7,051,031 Method, system, and program for managing accesses to data objects by multiple user programs over a network
Provided is a method, system, and program for managing access to data objects by multiple user programs over a network. A page is generated including at least...
US-7,051,030 Method and system for managing a directory with a template
A system of managing a directory with templates. A template file is created containing various structure templates. The templates entries may then be loaded into...
US-7,050,589 Client controlled data recovery management
Methods and systems in accordance with the present invention allow users' private keys corresponding to their digital certificates to be stored and archived...
US-7,050,307 Circuit board orientation in a computer system
Circuit board orientation in a computer system. A system includes a first set of circuit boards and a second set of circuit boards. The first set of circuit...
US-7,050,053 Geometric folding for cone-tree data compression
A system for performing visible object determination. Visualization software executing on one or more processors searches a cone tree with respect to a hull...
US-7,048,433 Self-righting, variable-orientation display assembly
Disclosed is a display assembly comprising a graphical or alphanumeric display and display source such as a clock or other timepiece; a display housing for...
US-7,048,169 Nail magazine for nailing gun
A nail magazine for alternatively accommodating T-nails or U-nails includes a nail track and a stop block. The nailing track has a bottom notch and a first nail...
US-D521,252 Yarn
US-7,047,447 Method and system for postmortem object type identification
A method for postmortem object type identification. In one method embodiment, the present invention accesses a memory dump. Next, a portion of the memory dump is...
US-7,047,282 Method using video buffers for receiving and transferring selected display output from a computer to a portable...
A handheld computing device is used to copy files from the screen of a fixed computer. The display of the handheld device is linked to that of the underlying...
US-7,046,250 Caching fonts for improved bandwidth of transmitted text
Caching fonts on a display computer may be performed in order to reduce network bandwidth utilization and/or to improve CPU usage. Text commands may be recorded...
US-7,046,017 Full-wave rectifier for capacitance measurements
One embodiment of the present invention provides an electronic circuit and method for measuring a capacitance. A signal generating mechanism generates a signal...
US-D520,840 Emergency tool
US-7,043,738 Method and apparatus for managing a data imaging system using CIM providers in a distributed computer system
A data imaging system is managed by a three-tiered system. The lowest, or agent, tier comprises Common Information Model (CIM) provider objects that reside in...
US-7,043,732 Method and apparatus for managing remote data replication using CIM providers in a distributed computer system
In accordance with the principles of the present invention, management of a data replication system is provided by a three-tiered arrangement. The lowest, or...
US-7,043,720 Mechanism for reformatting a simple source code statement into a compound source code statement
A mechanism for reformatting a simple source code statement into a compound source code statement is provided. Tokens are identified in unformatted source code,...
US-7,043,683 Data transmission update technique in low power modes
A data transmission update technique for use in a low power mode and/or a low activity mode of a computer system or a portion thereof is provided. When in the...
US-7,043,655 Redundant clock synthesizer
A clock architecture employing redundant clock synthesizers is disclosed. In one embodiment, a computer system includes first and second clock boards. The first...
US-7,043,609 Method and apparatus for protecting a state associated with a memory structure
A method for protecting reliability of data associated with a data array is provided. The method initiates with defining state information associated with the...
US-7,043,596 Method and apparatus for simulation processor
A method and apparatus for computation is provided. A main cluster crossbar is connected to a plurality of statically scheduled routing processors. A first...
US-7,043,585 Flexible system architecture with common interface for multiple system functions
An apparatus and method are disclosed that define a new, uniform I/O (input/output) interface architecture between the processor module and the motherboard of a...
US-7,043,533 Method and apparatus for arbitrating master-slave transactions
The present invention provides a method and apparatus for arbitrating master-slave transactions. The apparatus includes a slave device adapted to receive a first...
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