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Patent # Description
US-7,200,019 Dual match line architecture for content addressable memories and other data structures
A dual match line circuit may include precharge logic configured to precharge each of a hit match line, a miss match line and an evaluate node to an asserted...
US-7,199,806 Rasterization of primitives using parallel edge units
A graphical computing system comprising a control unit and a set of edge processing units. The control unit (a) receives a surface primitive, (b) transfers edge...
US-7,198,445 Washer with crush zone
A conical washer having a crush zone wherein the inner annular projection comprises a top and bottom elevation where the top elevation lies at an approximately...
US-D539,833 Eyeglass frame
US-D539,832 Eyeglass frame
US-D539,829 Eyeglasses
US-7,197,750 Java Bytecode instruction for determining hashcode values
Improved techniques for determining Java hashcode values for Java objects are disclosed. The techniques can be implemented to use a new Java Bytecode instruction...
US-7,197,746 Multipurpose lexical analyzer
A method for lexically analyzing an input stream including invoking a multipurpose lexical analyzer, wherein invoking the multipurpose lexical analyzer comprises...
US-7,197,629 Computing overhead for out-of-order processors by the difference in relative retirement times of instructions
A method of computing overhead associated with executing instructions on an out-of-order processor which includes determining when a first instruction retires,...
US-7,197,596 Computer arrangement using non-refreshed DRAM
A computer arrangement with a processor (5) and at least one memory unit (7, 9, 11, 13) connected to the processor (5) and including dynamic random access memory...
US-7,197,565 System and method of using a pipe advertisement for a peer-to-peer network entity in peer-to-peer presence...
Embodiments of a decentralized mechanism for detecting the presence of entities in a peer-to-peer network. In one embodiment, using pipes, a peer may uniquely...
US-7,197,511 Methods and apparatus for type safe, lazy, user-defined class loading
Type safe linkage is ensured by establishing a constraint if a class references an attribute that is contained in another class. This constraint acts as a...
US-7,197,411 Real-time power harness
A system that generates a dynamic trace of power consumption in a computer system. The system periodically polls current sensors and associated voltage sensors...
US-7,196,948 Method and apparatus for data capture on a bi-directional bus
A method for reading data from a memory module over a bi-directional bus is provided. The method initiates with issuing a read command. Then, a strobe signal is...
US-7,194,731 Method and apparatus for speculative tracing
A method of a speculative tracing, including defining the speculative tracing using a plurality of probes, firing at least one of the plurality of probes defined...
US-7,194,694 Device for indicating and providing information and links to quoted or reproduced material
The handling of quoted material in an electronic environment is enhanced by using one or more quote bars. Quote bars permit quoted material to be treated as a...
US-7,194,579 Sparse multi-component files
A file is striped across multiple filers, file servers or other devices, to create a sparsely striped multi-component file. Each filer stores one sparse...
US-7,194,569 Method of re-formatting data
A data structure is disclosed. The data structure includes a data descriptor record. In turn, the data descriptor record includes a type field, a base address...
US-7,194,501 Complementary pass gate logic implementation of 64-bit arithmetic logic unit using propagate, generate, and kill
An arithmetic logic unit (ALU) implemented with complementary pass gate logic using propagate, generate, and kill is provided. Broadly speaking, the ALU is a...
US-7,194,495 Non-blocking memory management mechanism for supporting dynamic-sized data structures
Solutions to a value recycling problem that we define herein facilitate implementations of computer programs that may execute as multithreaded computations in...
US-7,194,472 Extending role scope in a directory server system
Extending role scope in a directory server system. A directory server system comprises a directory server and a role mechanism. The directory server interacts...
US-7,193,844 Computer system storage
A server blade may be provided. The server blade may comprise a processor and storage. The server blade can further comprise an enclosure that encloses said...
US-7,193,541 Representation of sign in encoding scheme
The present invention is a method for representation of sign in an encoding scheme. An embodiment of the present invention provides a variable bit length binary...
US-7,193,447 Differential sense amplifier latch for high common mode input
A sense amplifier latch that is operable to interface with high common-mode input voltages with wide ranges for all process variations. The sense amplifier latch...
US-7,192,337 Method for cutting diamond
To provide a diamond rendering reflective light off a table goldenly brilliant by making a proportion thereof symmetrical at any place viewed from an upper face,...
US-D538,555 Eyeglass display
US-7,191,435 Method and system for optimizing software upgrades
A method for analyzing impact on binaries, software, and hardware of a planned software upgrade for a computer system. The method includes performing a...
US-7,191,425 Method and apparatus for inserting extra tracks during library architecture migration
One embodiment of the present invention provides a system that migrates a layout of a cell which is used in integrated circuit design. During operation, the...
US-7,191,423 Method and apparatus for folding and laying out electronic circuit
A method and apparatus folds a circuit having a plurality of transistors. The folding includes: (a) determining a number of folds to realize a desired layout of...
US-7,191,422 System and method for determining a carrier layout using cornered chip-to-chip input/output
A system and method for determining a carrier layout using cornered chip-to-chip input/output is presented. Each of a plurality of individual integrated circuit...
US-7,191,362 Parsing test results having diverse formats
An invention is disclosed for providing methods for parsing test results having diverse formats. Test results from executed test suites are identified. Test...
US-7,191,356 Method for asynchronous support of fault-tolerant and adaptive communication
An invention is provided for affording asynchronous fault-tolerant and adaptive communication in a distributed computing environment. The invention includes...
US-7,191,329 Automated resource management using perceptron prediction
A system and method for automatically identifying a desirable reconfiguration of computer system resources, using a perceptron to determine whether one resource...
US-7,191,316 Method and a system for using same set of registers to handle both single and double precision floating point...
A system for handling a plurality of single precision floating point instructions and a plurality of double precision floating point instructions that both index...
US-7,191,315 Method and system for tracking and recycling physical register assignment
The present invention provides methods and memory structures for efficient tracking and recycling of physical register assignments. The disclosed methods and...
US-7,191,307 Memory management unit technique to detect cross-region pointer stores
A method for detecting an invalid pointer including a source component and a target component, involving selecting a virtual source memory address for the source...
US-7,191,292 Logging of level-two cache transactions into banks of the level-two cache for system rollback
A plurality of processors on a chip is operated in lockstep. A crossbar switch on the chip couples and decouples the plurality of processors to a plurality of...
US-7,191,288 Method and apparatus for providing an application on a smart card
A smart card contains potentially multiple applications, each containing an application identifier (AID). Each application also incorporates an AID interpreter...
US-7,191,232 Extendable provisioning mechanism for a service gateway
A service gateway connects at least one local client to an external network. The service gateway is operable to hold at least one service module for providing a...
US-7,191,202 Comparator unit for comparing values of floating point operands
A floating point comparator circuit for comparing a plurality of floating point operands includes a plurality of analysis circuits, one for each of the floating...
US-7,191,096 Multi-dimensional sequential probability ratio test for detecting failure conditions in computer systems
One embodiment of the present invention provides a monitoring system that detects anomalies in data gathered from sensors in a computer system. During operation,...
US-7,191,090 Methods and systems for acoustically locating computer systems
A method for determining a physical location of a source is provided. The method includes receiving an acoustic signal from a source placed within an acoustic...
US-7,190,719 Impedance controlled transmitter with adaptive compensation for chip-to-chip communication
A method and apparatus for adjusting a frequency characteristic of a signal is provided. A transmitter circuit uses a driver circuit and a filter to generate the...
US-7,189,924 Rack-mount computer cable management arm
A cable management system for a component mounted in a rack includes a cable management arm and a bracket. The cable management arm may include a rear link...
US-7,188,739 Eyewear case and display method
Methods and apparatuses for an eyeglass case and display are provided. According to one aspect of the present invention, an eyeglass case permitting a consumer...
US-D538,067 Eyeglass display
US-RE39,519 Mixed execution stack and exception handling
Systems and methods for implementing an execution stack which stores frames for functions written in multiple programming languages are provided. The frames for...
US-7,188,324 Assertion morphing in functional verification of integrated circuit design
A method and apparatus provides a mechanism to transform or "morph" Formal verification method assertions so that an assertion defined in one Design Under Test...
US-7,188,296 ECC for component failures using Galois fields
An apparatus comprises a check bit encoder circuit and a check/correct circuit. The apparatus operates on encoded data blocks, wherein each encoded data block...
US-7,188,251 System and method for secure message-based leasing of resources in a distributed computing environment
A system and method for providing message-based leasing of resources in a distributed computing environment. Services may issue leases to clients and provide...
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