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Patent # Description
US-7,325,211 Clock skew modelling using delay stamping
A method for determining clock skew to avoid hold time violations is provided. The method includes obtaining a total delay to a source by adding a first delay...
US-7,325,207 Automatic device strength based sensitization generation for sequential elements
The method and apparatus for analysis of integrated circuits using static timing analysis. For a circuit being analyzed, the value of the state net for the case...
US-7,325,202 Method and system for selectively retrieving updated information from one or more websites
A computer system having a user specified web browsing system for selectively retrieving content from a variety of web sites is disclosed. The web browser of the...
US-7,325,154 Service redundancy
An information processing system is provided. The information processing system comprises: an information processing subsystem including a processor and a...
US-7,325,128 Log-on service providing credential level change without loss of session continuity
A security architecture has been developed in which a single sign-on is provided for multiple information resources. Rather than specifying a single...
US-7,325,106 Method for monitoring heap for memory leaks
A low overhead method for identifying memory leaks is provided. The low overhead method includes a) detecting completion of a garbage collection cycle; and b)...
US-7,325,102 Mechanism and method for cache snoop filtering
A mechanism for filtering snoop requests to a cache memory includes, in one embodiment, a storage including a plurality of entries configured to store...
US-7,325,101 Techniques for reducing off-chip cache memory accesses
Cache lines stored in an on-chip cache memory are associated with one or more state bits that indicate whether data stored in the cache lines was sourced from an...
US-7,324,564 Transmitting odd-sized packets over a double data rate link
A method may involve: receiving an even number of odd-sized packets for transmission over a double data rate link; re-packetizing the even number of odd-sized...
US-7,323,363 Contact load profile modification for a compression socketed CPU
A integrated circuit housing includes a first clamping hardware, a second clamping hardware operatively connected to the first clamping hardware, and an...
US-7,323,046 Phthalocyanine pigments with neutral metallic down flop
Phthalocyanine pigments having 0-4 chlorine atoms have a narrow particle-size range with 90% of particles between about 0.01-0.10 .mu.m, the average particle...
US-7,322,051 Fastening structure for headband of ski goggles
A headband fastening structure for ski goggles includes a lens fitted in a goggle frame and a headband. The lens and having a pair of extending segments on...
US-D560,360 Eyeglass case
US-7,321,909 Method and apparatus for forwarding references to objects concurrently with space-incremental garbage collection
In order to prevent concurrent garbage collection using a space-incremental algorithm from corrupting objects, objects are evacuated by copying them to relocated...
US-7,321,697 Block-based, adaptive, lossless image coder
Method and system for lossless compression coding of a digitally represented image. The image is expressed as one or more blocks, each block having a sequence of...
US-7,321,312 Non-volatile fault indication
In a computer system a non-volatile fault indicator in a positional relationship with at least one system component is settable to maintain a fault indication...
US-7,321,307 Chemical time modification of an object
A method for modifying an object involves determining a modification rate for the object, creating a first reservoir and a first wicking channel based on the...
US-7,320,317 Auxiliary device for engine spark plug ignition
An auxiliary device for sparkplug ignition is provided having a case, and provided therein, electrolytic capacitors connected in parallel between ground...
US-D560,205 Clock radio
US-D560,204 Clock radio
US-D560,123 Wristband timer watch
US-7,320,123 Method and system for detecting deprecated elements during runtime
A method for controlling access to deprecated methods of an implementation is provided. The method includes receiving a request to access a method that has been...
US-7,320,114 Method and system for verification of soft error handling with application to CMT processors
A method provides for verifying soft error handling in an integrated circuit (IC) design. A diagnostic program is executed on a virtual IC based on the IC design...
US-7,320,076 Method and apparatus for a transaction-based secure storage file system
A method for generating a secure storage file system, including encrypting data using a symmetric key to obtain encrypted data, encrypting the symmetric key...
US-7,320,063 Synchronization primitives for flexible scheduling of functional unit operations
A processor employing synchronization primitives for flexible scheduling of functional unit operations. In one embodiment, a processor may include a number of...
US-7,320,035 Object mutation determination for incremental state saves
A client-server system may include a distributed store configured to maintain a primary state of session data. The system may also include one or more...
US-7,320,023 Mechanism for caching dynamically generated content
A mechanism for caching dynamically generated content is disclosed, wherein initially, a server receives a request from a client for a set of dynamically...
US-7,319,948 Blocking access to selected APIs
A method for testing operation of a computer application. An emulator is provided to run on a development platform subject to limitations of multiple different...
US-7,318,532 Slam latch for rackmount rail
A rackmount system for a component may include outer slide members that couple with inner slide members. The outer slide members may be coupled to a rack with...
US-7,318,229 Method, system, and program for dispatching a method call
Provided are a method, system, and program for processing a call. A call is invoked from a caller object to a target object, wherein the caller and target...
US-7,318,222 Methods for execution control acquistion of a program and for executing an optimized version of a program
In a method for execution control acquisition of a program, during the execution of the program, it is determined when a hardware performance counter has reached...
US-7,318,128 Methods and apparatus for selecting processes for execution
Mechanisms and techniques operate in a multiprocessing computer system having a plurality of processing devices and provide an affinity-based wakeup locality...
US-7,318,114 System and method for dynamic memory interleaving and de-interleaving
In one embodiment, a system includes a plurality of memory controllers each coupled between a processor and a respective memory. Each memory controller includes...
US-7,317,110 Low dielectric constant organo-soluble polyimides
The present invention provides a series of easily processable poly(ether-imide)s that are organic-soluble and afford low dielectric constants of films, their...
US-7,316,021 Switching method in a multi-threaded processor
A processor includes logic for attaining a very fast exception handling functionality while executing non-threaded programs by invoking a multithreaded-type...
US-7,316,010 Methods for sharing conditionally across class loaders dynamically compiled code
A method for conditionally sharing dynamically compiled code between different class loaders is provided. In this method, bytecodes of a first class type are...
US-7,316,007 Optimization of n-base typed arithmetic expressions
A method for arithmetic expression optimization includes receiving a first instruction defined for a first processor having a first base, the first instruction...
US-7,315,919 Bandwidth reduction technique in a snooping-based cache-coherent cluster of multiprocessing nodes
A cluster of multiprocessing nodes uses snooping-based cache-coherence to maintain consistency among the cache memories of the multiprocessing nodes. One or more...
US-7,315,218 Method and apparatus to center the frequency of a voltage-controlled oscillator
A circuit and method are provided for calibrating an analog oscillator in the digital domain. The circuit and method disclosed herein centers an oscillation...
US-D558,523 Round mug with triangular base
US-7,313,795 Method and system for managing resource allocation in non-uniform resource access computer systems
A method and system of managing resource allocation in a non-uniform resource access computer system is disclosed. A method comprises determining access costs...
US-7,313,789 Methods and systems for reducing a program size
A method for reducing a size of an image of a class file is provided. In this method, a first stack map that is associated with a first bytecode of a method and...
US-7,313,767 System and method for presenting time related data on a small screen device
An invention is provided for presenting time related data on small screen devices is disclosed. The invention includes examining a plurality of time related data...
US-7,313,745 Decoder for pin-based scan test
An integrated circuit design block includes combinational and sequential logic defining core logic of the integrated circuit design block, and boundary logic...
US-7,313,735 In-line server health checking
A system and method provide in-line server health checks to determine server health without having to wait for a next out-of-band polling interval as with...
US-7,313,717 Error management
A computer system includes a plurality of field replaceable units. A system controller monitors system errors. A diagnostic engine is responsive to the system...
US-7,313,661 Tool for identifying causes of memory leaks
A method for identifying memory leak causes is provided. The method initiates with tracking a number of allocations of objects during a time period. Potentially...
US-7,313,614 Switching system
A system and method for provided a switch system (100) having a first configurable set of processor elements (102) to process storage resource connection...
US-7,313,566 Method and apparatus for isolating selected heap objects using a faulting address trap
All references to an object subset to which an atomic operation is to be applied are deliberately transformed so that an attempt by an application thread to...
US-7,313,547 Manager level device/service arbitrator and methods
A method for managing access to service entities (e.g., such as a devices, resources, and services, which are limited resources) is provided. The method includes...
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