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Patent # Description
US-7,362,575 Cooling method use diamond pins and heat pipes
An apparatus for cooling a microprocessor includes a first thermal interface material layer; a lid that encases the first thermal interface material layer and...
US-7,361,693 Low density polymer beads
Low density polymeric beads made by polymerizing monomeric building blocks into large crosslinked polymer molecules in porous, spherical bead form by droplet or...
US-7,361,218 Method and apparatus for fabricating a crystal fiber
The present invention relates to a method for fabricating a crystal fiber having different regions of polarization inversion, comprising the following steps: (a)...
US-7,360,240 Portable network encryption keys
A portable storage device, for example a secure smart card, contains network identification information for a processing unit that is connectable to a data...
US-7,360,200 Methods and systems for software watchdog support
Methods and systems consistent with the present invention allow a program designer to conveniently specify and support watchdog checking of a program under...
US-7,360,162 Color quality and packet shaping features for displaying an application on various client devices
In a client-server architecture, data transmission performance enhancing features are described, including a color quality approach and a packet shaping...
US-7,360,134 Centralized BIST engine for testing on-chip memory structures
One embodiment of the present invention provides a system that uses a single built-in-self-test (BIST) engine to test multiple on-chip memory structures. During...
US-7,360,132 System and method for memory chip kill
A memory interface comprising a first data input for receiving a data line to be stored in memory, a bad chip register containing a bad chip value for...
US-7,360,056 Multi-node system in which global address generated by processing subsystem includes global to local...
A system may include a plurality of nodes. Each node may include one or more active devices coupled to one or more memory subsystems. An active device included...
US-7,360,043 Method and apparatus for efficiently determining rank in an LRU list
One embodiment of the present invention provides a system that manages an LRU list such that the rank, or position, of data records in the sequence can be...
US-7,360,029 Multi-node computer system in which interfaces provide data to satisfy coherency transactions when no owning...
A system may include a node coupled to an additional node by an inter-node network. The node may include several active devices, an interface to the inter-node...
US-7,360,028 Explicit store-to-instruction-space instruction for self-modifying code and ensuring memory coherence between...
A method and apparatus for performing a store-to-instruction-space instruction are provided. A unique opcode indicates that a data value is to be written to an...
US-7,360,020 Method for improving cache-miss performance
A cache memory with improved cache-miss performance is implemented by providing cache-miss data from system memory directly to its requester. One embodiment of...
US-7,359,959 Method and apparatus for using a USB cable as a cluster quorum device
A method for obtaining a quorum vote by a first node using a Universal Serial Bus (USB) quorum cable, wherein the USB quorum cable comprises a first end...
US-7,359,834 Monitoring system-calls to identify runaway processes within a computer system
One embodiment of the present invention provides a system that monitors system-calls to identify runaway processes within a computer system. First, the system...
US-7,358,960 System and method for displaying two-dimensional data on small screen devices
An invention is provided for displaying two-dimensional data on small screen devices. The invention includes providing a first data set display section on a...
US-7,357,677 Micro SD adapter structure
A micro SD adapter structure includes a casing having an insert slot, a hollow portion at the casing, an embedding groove at the hollow portion, a plurality of...
US-D566,423 Eyeglass display
US-7,356,667 Method and apparatus for performing address translation in a computer system
An address translation unit is provided for use in a computer system. The unit contains a set of page table entries for mapping from a virtual address to a...
US-7,356,636 Virtualized PCI switch
A PCI-Express interconnect device is provided. The device comprises: first and second upstream ports; first and second downstream ports; and a management entity....
US-7,356,213 Transparent switch using optical and electrical proximity communication
Embodiments of a switch are described. This switch includes input ports configured to receive signals (which include data) and output ports configured to output...
US-7,356,039 Method and apparatus for describing multiple packets to hardware
A system and method for describing multiple packets to a communication module or device without requiring descriptors for each packet. A device driver for the...
US-7,354,957 Multi-functional thioxanthone photoinitiators
Compounds of formula (I): {where n is a number from 1 to 6; R.sup.3 is hydrogen, methyl or ethyl; A represents a group of formula ...
US-D566,192 Notepad holder
US-D566,097 FM scanner radio flashlight
US-7,353,503 Efficient dead code elimination
Disclosed is a method for eliminating dead code from a computer program using an operands graph generated from a flow graph of a computer program. In one...
US-7,353,499 Multiple instruction dispatch tables for application program obfuscation
Obfuscating an application program comprises reading an application program comprising code, determining multiple dispatch tables associated with the application...
US-7,353,445 Cache error handling in a multithreaded/multi-core processor
In one embodiment, a processor comprises a cache shared by a plurality of threads in execution by the processor, an error detection unit coupled to the cache,...
US-7,353,432 Maintaining high data integrity
A protection domain for a set of errors is defined using an association between data and first integrity metadata to protect data traversing an input/output...
US-7,353,431 Method and apparatus for proactive fault monitoring in interconnects
A system that detects the onset of degradation for interconnections in a component within a computer system. During operation, the system monitors inferential...
US-7,353,421 Method and apparatus for determining and allocating clock frequencies for plurality of processing units on...
A method and apparatus for operating a computer system comprising a first and a second computing unit, the method comprising selecting a first clock frequency...
US-7,353,418 Method and apparatus for updating serial devices
The present invention provides a method and apparatus for updating serial devices. The apparatus includes a plurality of serial registers. The apparatus further...
US-7,353,400 Secure program execution depending on predictable error correction
A CPU is provided with an ability to modify its operation, with respect to error correction, as a programmable feature. An error correction scheme is selected to...
US-7,353,364 Apparatus and method for sharing a functional unit execution resource among a plurality of functional units
An apparatus and method for sharing a functional unit. In one embodiment, a processor may include instruction fetch logic configured to issue instructions, and a...
US-7,353,360 Method for maximizing page locality
A method for maximizing page locality within a networking system operationally attached to a plurality of processing entities wherein each processing entity...
US-7,353,342 Shared lease instruction support for transient blocking synchronization
A computer system implementing transient blocking synchronization allows a memory location leased by a first process to be read-accessible to another process. In...
US-7,353,340 Multiple independent coherence planes for maintaining coherency
In one embodiment, a node comprises at least one processor core and a plurality of coherence units. The processor core is configured to generate an address to...
US-7,353,225 Mechanism for comparing content in data structures
A mechanism is provided for automatically comparing content in a plurality of data structures. In one embodiment, this mechanism does not perform a literal,...
US-7,352,949 Fiber used in wideband amplified spontaneous emission light source and the method of making the same
The present invention relates to a fiber having a core of crystal fiber doped with chromium and a glass cladding. The fiber has a gain bandwidth of more than 300...
US-7,352,762 Method and system for messaging to a cluster
A system and method for distributing and processing messages in a clustered environment may have a message producer, a message middleware component, and at a...
US-7,352,741 Method and apparatus for speculative arbitration
An arbiter is used so multiple users can use shared resources. The arbiter allocates at least one of the resources speculatively to one of the users for use...
US-7,352,641 Dynamic memory throttling for power and thermal limitations
In one embodiment, a memory controller is coupled to a memory subsystem and controls accesses to the memory subsystem. In addition, a temperature sensor is...
US-7,352,589 Modular computer system mechanical interconnection
A modular computer system mechanical interconnection includes a primary chassis having a first opening and a secondary chassis attached to the primary chassis...
US-7,352,289 System and method for detecting the connection state of a network cable connector
A method for detecting a network cable connection state is disclosed. The method includes detecting a change of connection state of a connector using a sensor...
US-7,350,698 Line item approval processing in an electronic purchasing system and method
In an electronic purchasing system, a line item approval processing method and system. The line item approval system includes logic for approving a purchase...
US-D565,767 LED spot light
US-D565,655 Pen
US-D565,635 Eyeglasses
US-D565,538 Photo frame radio with scrolling message
US-7,350,196 Mechanism for lossless function entry and return tracing
A method for tracing an instrumented program, including triggering an trap instruction in the instrumented program, transferring control of the instrumented...
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