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Patent # Description
US-7,363,606 Flip-flop insertion method for global interconnect pipelining
A method for inserting flip-flops in an interconnect is provided such that a cycle time constraint for the interconnect is satisfied. First of all, a flop is...
US-7,363,546 Latent fault detector
A latent error detector may be configured to reveal latent errors within a plurality of components within a computer system. The latent error detector may be...
US-7,363,531 Data synchronization for system controllers
A system controller module is operable to monitor system operation in a system that can include a further such system controller module. The system controller...
US-7,363,514 Storage area network(SAN) booting method
A method for performing a boot from a storage network. A first server stores boot configuration information linked to or searchable by a network device...
US-7,363,499 Blinded encryption and decryption
A method and system for utilizing and encryption or decryption agent so as to preclude access by the encryption agent or decryption agent, respectively, to the...
US-7,363,462 Performing virtual to global address translation in processing subsystem
A system may include a plurality of nodes. Each node may include one or more active devices coupled to one or more memory subsystems. Each active device in one...
US-7,363,457 Method and system for providing virtualization data services for legacy storage devices
A method, and associated system, for delivering data services such as virtualization to legacy devices. The method involves reserving a metadata region in memory...
US-7,363,450 Method and apparatus for estimating multithreaded processor throughput based on processor cache performance
An estimate is calculated of the throughput of a multi-threaded processor having N threads based on measured miss rates of a cache memory associated with the...
US-7,363,438 Extendable memory work-stealing
A deque of a local process in a memory work-stealing implementation may use one or more data structures to perform work. If the local process attempts to add a...
US-7,363,435 System and method for coherence prediction
A coherence prediction mechanism includes a synchronization manager and a plurality of access predictors. The synchronization manager maintains one or more...
US-7,363,383 Running a communication protocol state machine through a packet classifier
One embodiment of the invention relates to processing communication packets. A communication packet belongs to a communication data structure (called "conn")...
US-7,363,337 Floating point divider with embedded status information
A system for providing floating point division includes an analyzer circuit configured to determine a first status of a first floating point operand and a second...
US-7,363,283 Method for scheduling jobs using distributed utility-based oversubscription policies
One embodiment of the present invention provides a system that assigns jobs to a system containing a number of central processing units (CPUs). During operation,...
US-7,363,211 Method and apparatus for modeling topology objects
The invention relates to a method for modeling a device in a topology including defining a managed object corresponding to the device, defining a managed...
US-7,362,764 Method and apparatus for verifying service level in a communications network
One embodiment of the invention provides apparatus and a method for handling an incoming packet at a port in a network. The port belongs to one or more...
US-7,362,701 Customer-based service system including a cascaded pipeline with self-monitoring relays
A computer-based system that permits a service-provider to monitoring other computer systems includes a plurality of relays. A monitored relay collects data from...
US-7,362,575 Cooling method use diamond pins and heat pipes
An apparatus for cooling a microprocessor includes a first thermal interface material layer; a lid that encases the first thermal interface material layer and...
US-7,361,693 Low density polymer beads
Low density polymeric beads made by polymerizing monomeric building blocks into large crosslinked polymer molecules in porous, spherical bead form by droplet or...
US-7,361,218 Method and apparatus for fabricating a crystal fiber
The present invention relates to a method for fabricating a crystal fiber having different regions of polarization inversion, comprising the following steps: (a)...
US-7,360,240 Portable network encryption keys
A portable storage device, for example a secure smart card, contains network identification information for a processing unit that is connectable to a data...
US-7,360,200 Methods and systems for software watchdog support
Methods and systems consistent with the present invention allow a program designer to conveniently specify and support watchdog checking of a program under...
US-7,360,162 Color quality and packet shaping features for displaying an application on various client devices
In a client-server architecture, data transmission performance enhancing features are described, including a color quality approach and a packet shaping...
US-7,360,134 Centralized BIST engine for testing on-chip memory structures
One embodiment of the present invention provides a system that uses a single built-in-self-test (BIST) engine to test multiple on-chip memory structures. During...
US-7,360,132 System and method for memory chip kill
A memory interface comprising a first data input for receiving a data line to be stored in memory, a bad chip register containing a bad chip value for...
US-7,360,056 Multi-node system in which global address generated by processing subsystem includes global to local...
A system may include a plurality of nodes. Each node may include one or more active devices coupled to one or more memory subsystems. An active device included...
US-7,360,043 Method and apparatus for efficiently determining rank in an LRU list
One embodiment of the present invention provides a system that manages an LRU list such that the rank, or position, of data records in the sequence can be...
US-7,360,029 Multi-node computer system in which interfaces provide data to satisfy coherency transactions when no owning...
A system may include a node coupled to an additional node by an inter-node network. The node may include several active devices, an interface to the inter-node...
US-7,360,028 Explicit store-to-instruction-space instruction for self-modifying code and ensuring memory coherence between...
A method and apparatus for performing a store-to-instruction-space instruction are provided. A unique opcode indicates that a data value is to be written to an...
US-7,360,020 Method for improving cache-miss performance
A cache memory with improved cache-miss performance is implemented by providing cache-miss data from system memory directly to its requester. One embodiment of...
US-7,359,959 Method and apparatus for using a USB cable as a cluster quorum device
A method for obtaining a quorum vote by a first node using a Universal Serial Bus (USB) quorum cable, wherein the USB quorum cable comprises a first end...
US-7,359,834 Monitoring system-calls to identify runaway processes within a computer system
One embodiment of the present invention provides a system that monitors system-calls to identify runaway processes within a computer system. First, the system...
US-7,358,960 System and method for displaying two-dimensional data on small screen devices
An invention is provided for displaying two-dimensional data on small screen devices. The invention includes providing a first data set display section on a...
US-7,357,677 Micro SD adapter structure
A micro SD adapter structure includes a casing having an insert slot, a hollow portion at the casing, an embedding groove at the hollow portion, a plurality of...
US-D566,423 Eyeglass display
US-7,356,667 Method and apparatus for performing address translation in a computer system
An address translation unit is provided for use in a computer system. The unit contains a set of page table entries for mapping from a virtual address to a...
US-7,356,636 Virtualized PCI switch
A PCI-Express interconnect device is provided. The device comprises: first and second upstream ports; first and second downstream ports; and a management entity....
US-7,356,213 Transparent switch using optical and electrical proximity communication
Embodiments of a switch are described. This switch includes input ports configured to receive signals (which include data) and output ports configured to output...
US-7,356,039 Method and apparatus for describing multiple packets to hardware
A system and method for describing multiple packets to a communication module or device without requiring descriptors for each packet. A device driver for the...
US-7,354,957 Multi-functional thioxanthone photoinitiators
Compounds of formula (I): {where n is a number from 1 to 6; R.sup.3 is hydrogen, methyl or ethyl; A represents a group of formula ...
US-D566,192 Notepad holder
US-D566,097 FM scanner radio flashlight
US-7,353,503 Efficient dead code elimination
Disclosed is a method for eliminating dead code from a computer program using an operands graph generated from a flow graph of a computer program. In one...
US-7,353,499 Multiple instruction dispatch tables for application program obfuscation
Obfuscating an application program comprises reading an application program comprising code, determining multiple dispatch tables associated with the application...
US-7,353,445 Cache error handling in a multithreaded/multi-core processor
In one embodiment, a processor comprises a cache shared by a plurality of threads in execution by the processor, an error detection unit coupled to the cache,...
US-7,353,432 Maintaining high data integrity
A protection domain for a set of errors is defined using an association between data and first integrity metadata to protect data traversing an input/output...
US-7,353,431 Method and apparatus for proactive fault monitoring in interconnects
A system that detects the onset of degradation for interconnections in a component within a computer system. During operation, the system monitors inferential...
US-7,353,421 Method and apparatus for determining and allocating clock frequencies for plurality of processing units on...
A method and apparatus for operating a computer system comprising a first and a second computing unit, the method comprising selecting a first clock frequency...
US-7,353,418 Method and apparatus for updating serial devices
The present invention provides a method and apparatus for updating serial devices. The apparatus includes a plurality of serial registers. The apparatus further...
US-7,353,400 Secure program execution depending on predictable error correction
A CPU is provided with an ability to modify its operation, with respect to error correction, as a programmable feature. An error correction scheme is selected to...
US-7,353,364 Apparatus and method for sharing a functional unit execution resource among a plurality of functional units
An apparatus and method for sharing a functional unit. In one embodiment, a processor may include instruction fetch logic configured to issue instructions, and a...
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