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Patent # Description
US-7,444,268 Method and apparatus for identifying a drift in a quantized signal in a computer system
One embodiment of the present invention provides a system that identifies a drift in a signal in a computer system. During operation, the system receives a...
US-7,443,981 Execution unit for performing the data encryption standard
An execution unit adapted to perform at least a portion of the Data Encryption Standard. The execution unit includes a Left Half input; a Key input; and a Table...
US-7,443,878 System for scaling by parallelizing network workload
A method for scaling a network system which includes providing at least one network interface and providing a flexible association between packets and a...
US-7,443,860 Method and apparatus for source authentication in a communications network
One embodiment of the invention provides a method of handling an incoming packet at a node in a network. The method includes associating at least one source...
US-7,443,759 Reduced-power memory with per-sector ground control
A reduced-power memory (such as for a cache memory system of a processor or a microprocessor) provides per-sector ground control to advantageously reduce power...
US-7,443,694 25 degree tool-less expansion card bracket
An expansion card bracket for a computer server has an expansion card support attachable to a motherboard and an expansion card accepting portion disposed near a...
US-7,443,206 High-frequency linear phase-frequency detector with wide-pulse outputs
A circuit and method are provided for detecting a phase difference between at least two periodic signals. The circuit and method disclosed herein provide pulsed...
US-7,443,065 Cooling fan
A cooling fan includes: a casing having a base wall and a surrounding wall that extends transversely from the base wall, and that has an inner wall surface and a...
US-D579,498 Pen cap and clip
US-D579,493 Card
US-D579,266 Set of pot handles
US-7,441,201 Method for placing graphical user interface components in three dimensions
A method for creating a three-dimensional (3D) graphical user interface (GUI) involves creating a first two-dimensional (2D) container and a second 2D container,...
US-7,441,026 System and method for guarding against infinite loops from multi-point redirects in a multi-threaded environment
A computer system having a user specified web browsing system for selectively monitoring application request to web based applications to detect and track...
US-7,441,022 Resolving conflicts between network service rule sets for network data traffic in a system where rule patterns...
One embodiment of the present invention provides a system that resolves conflicts between network service rules for network data traffic in a system where rule...
US-7,441,021 Methods and apparatus for producing a configuration for components of a network
A computerized device displays graphical representations of network components of the network where each graphical representation shows corresponding...
US-7,437,716 Separation of data from metadata in a tracing framework
A method for storing a data set having an enabled probe identification component and an associated data component, including obtaining data from an instrumented...
US-7,437,612 Postmortem detection of owned mutual exclusion locks
In general, in one aspect, the invention relates to a method for identifying lock ownership, including identifying at least one node in the crash dump,...
US-7,437,556 Global visibility controls for operating system partitions
In accordance with one embodiment of the present invention, there is provided a mechanism for managing and controlling global visibility of resources in zones...
US-7,437,538 Apparatus and method for reducing execution latency of floating point operations having special case operands
An apparatus and method for floating-point special case handling. In one embodiment, a processor may include a first execution unit configured to execute a...
US-7,437,534 Local and global register partitioning technique
A Very Long Instruction Word (VLIW) processor having a plurality of functional units includes a multi-ported register file that is divided into a plurality of...
US-7,437,528 Gang blocks
A method for allocating space on a disk involving receiving a request to allocate space on the disk having a first size, determining whether contiguous space of...
US-7,437,505 Logical to physical device topological location mappings
A computer readable medium includes executable instructions for visually representing a status of a plurality of storage device slots and a plurality of attached...
US-7,437,491 Clock and data recovery wherein an FB-DIMM is connected to signal path and null and sync frames control the FB-DIMM
Improved clock and data recovery involves transmitting one or more null frames prior to transmitting a sync frame. A receiving component detects for the sync...
US-7,436,861 Asynchronous control circuit with symmetric forward and reverse latencies
One embodiment of the present invention provides a control queue for an asynchronous circuit that includes a number of control modules coupled together linearly...
US-7,436,845 Input and output buffering
An Infiniband device is provided. The device has a plurality of input/output ports. Each port has associated therewith an input buffer for storage of a packet...
US-7,436,666 Thermal caching for liquid cooled computer systems
The failure of a data center liquid cooling system can result in a rapid temperature rise in electronic components that may either damage a component, result in...
US-7,436,059 Thermoelectric cooling device arrays
In various embodiments, a TEC device array may be coupled to a chip and a heat sink to cool the chip. The TEC device array may include multiple TEC devices...
US-7,434,412 Computer equipment temperature control system and methods for operating the same
A system and method for controlling temperature in an equipment enclosure are disclosed. The system includes an enclosure having a top side, side walls, a front...
US-D578,573 Pen
US-D578,538 Alloy rack door
US-D578,493 Switch housing
US-7,434,213 Portable executable source code representations
Platform independent processing of the source code is performed, such as lexical analysis, semantic analysis, syntax analysis, and platform independent...
US-7,434,210 Interposing library for page size dependency checking
A method for checking page size dependency including generating an interposing library comprising a first modified interface, wherein the first modified...
US-7,434,156 Method, system, program, and computer readable medium for providing a database for object oriented objects
Provided is a method, system, program, and computer readable medium for maintaining a database of objects. At least one structured document is received...
US-7,434,087 Graceful failover using augmented stubs
Various embodiments of a system and method for failing over one cluster node to another are disclosed. The system may include a client networked to a cluster of...
US-7,434,051 Method and apparatus for facilitating secure cocktail effect authentication
One embodiment of the present invention provides a system that facilitates confirmation of data communicated to a first device belonging to a first user from a...
US-7,434,031 Execution displacement read-write alias prediction
RAW aliasing can be predicted with register bypassing based at least in part on execution displacement alias prediction. Repeated aliasing between read and write...
US-7,434,004 Prefetch prediction
Predicting prefetch data sources for runahead execution triggering read operations eliminates the latency penalties of missing read operations that typically are...
US-7,434,000 Handling duplicate cache misses in a multithreaded/multi-core processor
In one embodiment, a processor comprises a cache and a cache miss unit coupled to the cache. The cache miss unit is configured to initiate a cache fill of a...
US-7,433,912 Multiplier structure supporting different precision multiplication operations
A unified data flow is provided that allows multiplication of SIMD and non-SIMD multiplies in one multiplier. The multiplies may be both integer and floating...
US-7,433,396 Methods and apparatus for equalization in single-ended chip-to-chip communication
Disclosed are novel methods and apparatus for efficiently providing equalization in single-ended chip-to-chip communication. In an embodiment, a method of...
US-7,430,737 Processor and method for supporting compiler directed multithreading management
In one embodiment, a processor includes an execution unit configured to execute one or more threads and a detection unit coupled to detect whether a given thread...
US-7,430,653 Pipelined processor with multi-cycle grouping for instruction dispatch with inter-group and intra-group...
A pipelined instruction dispatch or grouping circuit allows instruction dispatch decisions to be made over multiple processor cycles. In one embodiment, the...
US-7,430,643 Multiple contexts for efficient use of translation lookaside buffer
The present invention provides a method and apparatus for increased efficiency for translation lookaside buffers by collapsing redundant translation table...
US-7,430,576 Floating point square root provider with embedded status information
A system for providing a floating point square root comprises an analyzer circuit configured to determine a first status of a first floating point operand based...
US-7,430,568 Systems and methods for providing snapshot capabilities in a storage virtualization environment
Methods and systems consistent with the present invention provide distributed storage systems that are scalable, secure, available, and manageable. These storage...
US-7,430,494 Dynamic data stream histograms for no loss of information
A method for creating a histogram that includes identifying a lower extreme range counter and an upper extreme range counter for a plurality of data elements....
US-7,430,306 Methods and apparatus to verify identity using biomorphic information
A method of verifying the identity of a user by comparing a biomorphic sample from the user with a stored biomorphic pattern of the user, without access to an...
US-7,429,884 Pulse-signaling circuits for networks on chip
A pulse circuit contains an input stage configured to receive input pulses on input nodes using push-pull elements, wherein a given push-pull element is...
US-7,429,701 Power cord automatic retainer
A cord retaining apparatus includes a receptacle for receiving a head of a cord. A brack is mounted near the receptacle including an upper stop. An arm is...
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