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Postmortem detection of owned mutual exclusion locks
In general, in one aspect, the invention relates to a method for identifying lock ownership, including identifying at least one node in the crash dump,...
Global visibility controls for operating system partitions
In accordance with one embodiment of the present invention, there is provided a mechanism for managing and controlling global visibility of resources in zones...
Apparatus and method for reducing execution latency of floating point
operations having special case operands
An apparatus and method for floating-point special case handling. In one embodiment, a processor may include a first execution unit configured to execute a...
Local and global register partitioning technique
A Very Long Instruction Word (VLIW) processor having a plurality of functional units includes a multi-ported register file that is divided into a plurality of...
A method for allocating space on a disk involving receiving a request to allocate space on the disk having a first size, determining whether contiguous space of...
Logical to physical device topological location mappings
A computer readable medium includes executable instructions for visually representing a status of a plurality of storage device slots and a plurality of attached...
Clock and data recovery wherein an FB-DIMM is connected to signal path and
null and sync frames control the FB-DIMM
Improved clock and data recovery involves transmitting one or more null frames prior to transmitting a sync frame. A receiving component detects for the sync...
Asynchronous control circuit with symmetric forward and reverse latencies
One embodiment of the present invention provides a control queue for an asynchronous circuit that includes a number of control modules coupled together linearly...
Input and output buffering
An Infiniband device is provided. The device has a plurality of input/output ports. Each port has associated therewith an input buffer for storage of a packet...
Thermal caching for liquid cooled computer systems
The failure of a data center liquid cooling system can result in a rapid temperature rise in electronic components that may either damage a component, result in...
Thermoelectric cooling device arrays
In various embodiments, a TEC device array may be coupled to a chip and a heat sink to cool the chip. The TEC device array may include multiple TEC devices...
Computer equipment temperature control system and methods for operating
A system and method for controlling temperature in an equipment enclosure are disclosed. The system includes an enclosure having a top side, side walls, a front...
Alloy rack door
Portable executable source code representations
Platform independent processing of the source code is performed, such as lexical analysis, semantic analysis, syntax analysis, and platform independent...
Interposing library for page size dependency checking
A method for checking page size dependency including generating an interposing library comprising a first modified interface, wherein the first modified...
Method, system, program, and computer readable medium for providing a
database for object oriented objects
Provided is a method, system, program, and computer readable medium for maintaining a database of objects. At least one structured document is received...
Graceful failover using augmented stubs
Various embodiments of a system and method for failing over one cluster node to another are disclosed. The system may include a client networked to a cluster of...
Method and apparatus for facilitating secure cocktail effect
One embodiment of the present invention provides a system that facilitates confirmation of data communicated to a first device belonging to a first user from a...
Execution displacement read-write alias prediction
RAW aliasing can be predicted with register bypassing based at least in part on execution displacement alias prediction. Repeated aliasing between read and write...
Predicting prefetch data sources for runahead execution triggering read operations eliminates the latency penalties of missing read operations that typically are...
Handling duplicate cache misses in a multithreaded/multi-core processor
In one embodiment, a processor comprises a cache and a cache miss unit coupled to the cache. The cache miss unit is configured to initiate a cache fill of a...
Multiplier structure supporting different precision multiplication
A unified data flow is provided that allows multiplication of SIMD and non-SIMD multiplies in one multiplier. The multiplies may be both integer and floating...
Methods and apparatus for equalization in single-ended chip-to-chip
Disclosed are novel methods and apparatus for efficiently providing equalization in single-ended chip-to-chip communication. In an embodiment, a method of...
Processor and method for supporting compiler directed multithreading
In one embodiment, a processor includes an execution unit configured to execute one or more threads and a detection unit coupled to detect whether a given thread...
Pipelined processor with multi-cycle grouping for instruction dispatch
with inter-group and intra-group...
A pipelined instruction dispatch or grouping circuit allows instruction dispatch decisions to be made over multiple processor cycles. In one embodiment, the...
Multiple contexts for efficient use of translation lookaside buffer
The present invention provides a method and apparatus for increased efficiency for translation lookaside buffers by collapsing redundant translation table...
Floating point square root provider with embedded status information
A system for providing a floating point square root comprises an analyzer circuit configured to determine a first status of a first floating point operand based...
Systems and methods for providing snapshot capabilities in a storage
Methods and systems consistent with the present invention provide distributed storage systems that are scalable, secure, available, and manageable. These storage...
Dynamic data stream histograms for no loss of information
A method for creating a histogram that includes identifying a lower extreme range counter and an upper extreme range counter for a plurality of data elements....
Methods and apparatus to verify identity using biomorphic information
A method of verifying the identity of a user by comparing a biomorphic sample from the user with a stored biomorphic pattern of the user, without access to an...
Pulse-signaling circuits for networks on chip
A pulse circuit contains an input stage configured to receive input pulses on input nodes using push-pull elements, wherein a given push-pull element is...
Power cord automatic retainer
A cord retaining apparatus includes a receptacle for receiving a head of a cord. A brack is mounted near the receptacle including an upper stop. An arm is...
Electrostatic charge developing toner
The present invention provides an electrostatic charge developing toner which uses a .beta.-type copper phthalocyanine pigment that has a BET specific surface...
Water washable lithographic printing ink
Disclosed is a water washable ink for offset lithographic newspaper printing containing: a modified soybean oil-based resin; a pigment; and an acid...
Access control over dynamic intellectual capital content
Methods, systems, and articles of manufacture consistent with the present invention provide for access control over dynamic intellectual capital content. A...
Age segregation for garbage collector
A garbage collector treats a heap as divided into regions. From a candidate set of those regions, it selects the collection sets on which it performs collection...
Method and apparatus for data aggregation in a distributed system
The invention involves a method for aggregating data in a distributed system. The method includes specifying an aggregation scope including a plurality of nodes,...
Distributed processing framework system
A processing system is provided. The processing system includes a master system and a processing resource. The master system is designed to execute a service...
Transformation of objects between a computer programming language and a
data representation language
A virtual machine (e.g. the Java Virtual Machine (JVM)) may include extensions for compiling objects (e.g. Java Objects) into data representation language (e.g....
System and method for dynamic preloading of classes through memory space
cloning of a master runtime system process
A system and method for dynamic preloading of classes through memory space cloning of a master runtime system process is presented. A master runtime system...
Arbitration of window swap operations
In one embodiment, a processor comprises a register file, register management logic coupled to the register file, and at least two sources of window swap...
Virtual output buffer architecture
A buffer architecture enables linked lists to be used to administer virtual output queue buffering. The buffer has three random access memories (RAMs). A data...
System and method for determining availability of an arbitrary network
A method of operating a network system may involve receiving data indicating a configuration of components that are included in the network system, detecting a...
Measuring chip-to-chip capacitance differentials by demodulating signals
over a capacitance bridge
In a method for determining capacitance, a first time-varying signal is driven on a first terminal of a first capacitor and a second time-varying signal is...
Multi-chip module structure with power delivery using flexible cables
One embodiment of the present invention provides an integrated circuit module. This module includes a semiconductor die with an active face, upon which active...