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Method and apparatus for enforcing packet destination specific priority
A method for processing a plurality of packets that includes receiving the plurality of packets from a network, analyzing each of the plurality of packets by a...
Method of manufacturing electrolytic capacitor and electrolytic capacitor
A method of manufacturing an electrolytic capacitor including the following steps as well as an electrolytic capacitor manufactured by the method are provided....
Flow rate estimation method of blood pump
In a flow rate estimation method of a blood pump, a general flow rate estimation formula which includes a correction term is formed based on a plurality of blood...
Integrated part-less enclosure/fan access door hinge
System and methods for deadlock detection
A lightweight, concurrent detection mechanism avoids global thread suspension by operating during runtime with threads under examination. A particular...
Error analysis and diagnosis for generic function calls
A method and computer program product for detecting and diagnosing errors in a generic function call and then presenting them in an error message is disclosed. A...
Power throttling in a memory system
A memory system is disclosed. The memory system includes a memory controller coupled to one or more memory modules, at least one of the memory modules including...
Privacy and identification in a data communications network
A method for managing identification in a data communications network includes receiving a user-controlled secure storage device and enrolling the user with an...
Modeling operating system instances
A method and mechanism for managing operating system instances in a computing system. A computing system is configured to enable users to model and manage...
Controlling contention via transactional timers among conflicting
transactions issued by processors operating...
A system for controlling contention between conflicting transactions in a transactional memory system. During operation, the system receives a request to access...
Methods and apparatus to implement parallel transactions
Cache logic associated with a respective one of multiple processing threads executing in parallel updates corresponding data fields of a cache to uniquely mark...
Method and apparatus for maintaining cache coherency in a memory system
with shared only cache memories
In data processing systems that use a snoopy based cache coherence protocol and which contain a read only cache memory with a bounded range of addresses, a cache...
Proximity communication-based off-chip cache memory architectures
A proximity interconnect module includes a plurality of off-chip cache memories. Either disposed external to the proximity interconnect module or on the...
Reducing resource consumption by ineffective write operations
It has been discovered that preventing performance of ineffective write operations reduces demand on memory bandwidth, as well as preventing unnecessary...
Method and apparatus for compressing data in a file system
A method for storing a data block, comprising compressing the data block using a first compression algorithm to obtain a compressed data block, generating a data...
Single-step fiber grinding process and apparatus
A fiber grinding process includes: contacting an end of the optical fiber with a grinding surface in such a manner that a central axis of the optical fiber at...
A luminous skirt includes a transparent outer skirt cover and a luminous inner skirt cover. The inner skirt cover consists of an inner skirt, and outer skirt...
Edible fruit product in the shape of a turtle
Apparatus and method for synchronizing multiple threads in an out-of-order
The present invention generally relates to synchronization of multiple threads in an out-of-order microprocessor utilizing the insertion of a trap. In one...
Scrolling vertical column mechanism for cellular telephone
A system and method of navigating a mobile device display includes highlighting a first icon in a main portion of the mobile device display. The main portion is...
Coprocessor receiving renamed register identifier from master to complete
an operation upon register data ready
A method for synchronized renaming between a master processor and a coprocessor includes sending from the master processor an operation for execution by the...
A cooling fan includes: a casing having a surrounding wall that defines an accommodating space; a circuit board disposed in the accommodating space and including...
The invention is to provide a switch lamp holder, which comprises: a core, having a switch control element stretched from its lateral and a set of penetrating...
Edible fruit product in the shape of a shell
Edible fruit product in the shape of a whale
Edible fruit product in the shape of an octopus
Edible fruit product in the shape of a seahorse
Resource adapter with modular system management interface
A resource adapter may include modular system management interface for providing an interface between server-provided management services and back-end systems....
Methods and apparatus for representing application dependencies
Methods and apparatus for representing application dependencies are disclosed. A software application is executed according to an associated state machine. A set...
Storing results of resolvable branches during speculative execution to
predict branches during non-speculative...
One embodiment of the present invention provides a system that facilitates storing results of resolvable branches during speculative execution, and then using...
Processor with register dirty bit tracking for efficient context switch
A processor including a large register file utilizes a dirty bit storage coupled to the register file and a dirty bit logic that controls resetting of the dirty...
Synchronizing master processor by stalling when tracking of coprocessor
rename register resource usage count...
Synchronized register renaming between a master processor and a coprocessor that receives operations from the master enables efficient implementation of register...
Dynamic resource allocation among master processors that require service
from a coprocessor
An apparatus and a method dynamically reassign resources in a coprocessor among master processors that require service from the coprocessor. The method includes...
Relocating data from a source page to a target page by marking transaction
table entries valid or invalid based...
According to one embodiment of the invention, a technique is provided for relocating the contents of kernel pages in a manner similar to techniques used for...
Multi-chip switch based on proximity communication
A switch contains a first semiconductor die, which is configured to receive signals on a plurality of input ports and to output the signals on a plurality of...
Automatic intent log testing
A method for testing an intent log for a file system that includes creating a first file system, issuing a command to freeze the first file system, performing a...
Mechanism for selectively providing mount information to processes running
within operating system partitions
A mechanism is disclosed for selectively providing mount information to processes running within operating system partitions. In one implementation, a non-global...
Snooping countermeasures for system indicators
A random noise generator is included in the drive circuit supplying power to a system indicator that emits optical signals. The random noise generator generates...
Method and system for using DLPI to negotiate advanced interfaces
A method for obtaining a capability of a network interface card (NIC). The method includes sending a first data link provider interface (DLPI) request to the NIC...
Method and apparatus to isolate changes in remoting system clients
Method and apparatus for dynamically and adaptively alternating encodings, protocols, and/or transports in remoting system clients. Embodiments may provide a...
System and method for providing multiple embodiments of abstract software
modules in peer-to-peer network...
System and method for providing multiple embodiments of abstract software modules in peer-to-peer network environments. A module class may have one or more...
Predictable repeater routing in an integrated circuit design
A mechanism is disclosed for assigning repeaters to signal paths in an integrated circuit design. The mechanism involves reserving, in a first metal layer of the...
Systematic approach for applying recommended rules on a circuit layout
A method and apparatus for enforcing design for manufacturability rules on a circuit layout is provided. A tool receives a first set of design rules, to be...
Visual representation and other effects for application management on a
device with a small screen
One embodiment of the present invention provides a system and a method for presenting a set of icons in a display so that the icons can be selected by a user via...
Multiprocess input redirection in a 3D window system
A 3D window system allows the contents of conventional windows created by client applications to be painted onto the surfaces of 3D objects which are then...