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Patent # Description
US-7,543,288 Reduced instruction set for Java virtual machines
Techniques for implementing virtual machine instructions suitable for execution in virtual machines are disclosed. The inventive virtual machine instructions can...
US-7,543,282 Method and apparatus for selectively executing different executable code versions which are optimized in...
One embodiment of the present invention provides a system that selectively executes different versions of executable code for the same source code. During...
US-7,543,275 Mechanism for executing test suites written for different harnesses under one test execution harness
A mechanism has been developed for transforming different test suites, written for different test harnesses, into a common XML-type format that can be read by...
US-7,543,272 Method and apparatus for finding terminal classes in a collection of programming language classes
One embodiment of the present invention provides a system that facilitates finding terminal classes in a collection of programming language classes, wherein a...
US-7,543,192 Estimating the residual life of a software system under a software-based failure mechanism
One embodiment of the present invention provides a system that estimates residual life of a software system under a software-based failure mechanism. During...
US-7,543,180 Enhancing throughput and fault-tolerance in a parallel-processing system
One embodiment of the present invention provides a system that enhances throughput and fault-tolerance in a parallel-processing system. During operation, the...
US-7,543,132 Optimizing hardware TLB reload performance in a highly-threaded processor with multiple page sizes
A method and apparatus for improved performance for reloading translation look-aside buffers in multithreading, multi-core processors. TSB prediction is...
US-7,543,112 Efficient on-chip instruction and data caching for chip multiprocessors
The storage of data line in one or more L1 caches and/or a shared L2 cache of a chip multiprocessor is dynamically optimized based on the sharing of the data...
US-7,543,017 Cluster file system node failure file recovery by reconstructing file state
A cluster file system including a file server primary configured to satisfy a plurality of file operation requests, a file server secondary configured to be...
US-7,543,007 Residue-based error detection for a shift operation
Errors in a shift result can be detected with a residue-based mechanism, instead of with duplication of an entire shifter. The commutative property of residue...
US-7,542,995 Method and apparatus for detecting a change-point in a time-series of computer telemetry signals
A system that detects a change point in a time series of telemetry signals from a computer system. During operation, the system receives the time series of...
US-7,541,611 Apparatus using Manhattan geometry having non-Manhattan current flow
A device is described, including a first diffusion region having a first terminal, a second diffusion region having a second terminal, and a channel region...
US-7,539,907 Method and apparatus for determining a predicted failure rate
A method and apparatus for determining predicted failure rates for computational resources provided by a system comprising multiple components. The method...
US-7,539,902 Application level testing of instruction caches in multi-processor/multi-core systems
A method and apparatus performs computer application level testing of an instruction cache in multi-processor or multi-core systems. Instruction cache cannot be...
US-7,539,871 System and method for identifying message propagation
Conventional virus detection software monitors incoming arrivals of network traffic. Retroactive analysis and/or monitoring of previously accepted traffic is not...
US-7,539,869 System and methods for using a signature protocol by a nonsigning client
In a networked computer environment, a client is unencumbered from signature generating components, yet conversant to transmit signature-based documents in a...
US-7,539,851 Using register readiness to facilitate value prediction
One embodiment of the present invention provides a system for using register readiness to facilitate value prediction. The system starts by loading a previously...
US-7,539,849 Maintaining a double-ended queue in a contiguous array with concurrent non-blocking insert and remove...
An array-based concurrent shared object implementation has been developed that provides non-blocking and linearizable access to the concurrent shared object. In...
US-7,539,837 Method and apparatus for reducing remembered set overhead in a generational garbage collector by constraining...
A remembered set for a memory heap region in a garbage-collected computer system is modified to classify reference locations stored therein by the heap region...
US-7,539,822 Method and apparatus for facilitating faster execution of code on a memory-constrained computing device
One embodiment of the present invention provides a system that facilitates faster execution of code on a memory-constrained computing device that has fast...
US-7,539,819 Cache operations with hierarchy control
An improved approach to cache management is disclosed which may be implemented to provide fine-grained control over individual caches or subsets of a multi-level...
US-7,539,776 Dynamic uniform resource locator compression
A method of converting between a uniform resource locator and a dynamically compressed uniform resource locator involving parsing the components of the uniform...
US-7,539,720 Low latency integer divider and integration with floating point divider and method
A method and device divides a dividend by a divisor, the dividend and the divisor both being integers. The method and device determine a maximum possible number...
US-7,539,713 Allocation of likely popular objects in the train algorithm
A garbage collector for reclaiming computer-memory space occupied by unreachable data objects operates incrementally in accordance with the train algorithm....
US-7,539,709 Dynamic data migration in a multi-tier storage system
A method and apparatus for managing data is described which includes determining the current state of a storage tier of a plurality of storage tiers within a...
US-7,539,418 Integrated ring modulator array WDM transceiver
A system that facilitates optical multiplexing and demultiplexing. The system includes an optical transmitter which is structured in the following way. A...
US-7,538,670 Method for detecting objects separated from a group
A method for monitoring a plurality of objects, involving configuring a sensor for a first object of the plurality of objects, wherein the sensor monitors an...
US-7,538,633 Method and apparatus for driving on-chip wires through capacitive coupling
One embodiment of the present invention provides a system which drives on-chip wires using capacitive coupling. During operation, the system drives a signal onto...
US-7,538,264 Ergonomic durable drumstick
The specification and drawing figures describe and show an ergonomic durable drumstick that includes a percussion member from which a tubular body extends. The...
US-7,536,722 Authentication system for two-factor authentication in enrollment and pin unblock
An authentication system includes a smart access card issued to a user, a client computer, a desktop authentication module configured to prevent a user from...
US-7,536,693 Method for load spreading of requests in a distributed data storage system
Incoming requests to a data storage system are distributed among one or more peer node computer systems of the data storage system in accordance with a load...
US-7,536,679 System and methods for test tool class inheritance
A software compliance test is typically directed only at particular classes in the inheritance hierarchy. Inherited APIs (classes), which are not the focus of...
US-7,536,370 Inferential diagnosing engines for grid-based computing systems
Disclosed herein is the creation and utilization of automated diagnostic agents that are used by service engineers to diagnose faults, errors and other events or...
US-7,536,184 Seamless mobility management with service detail records
A method for enhancing mobility of a subscriber in a telecommunications environment. The method includes deploying with a first network operator a service that...
US-7,535,704 Small form factor hard disk drive bracket latch/release mechanism
A hard disk drive bracket latch and release mechanism includes a lever arm attached to a hard disk drive bracket bezel rotatably between a closed position...
US-7,533,389 Dynamic loading of remote classes
System and method for dynamic loading of remote classes. Using embodiments, remote classes may be loaded dynamically by a default class loader without the use of...
US-7,533,388 Method and apparatus for dynamic Stubs and Ties in RMI-IIOP
Method and apparatus for the dynamic generation of Stubs and Ties in RMI-IIOP implementations. In embodiments, dynamic RMI-IIOP may generate Stubs and Ties as...
US-7,533,248 Multithreaded processor including a functional unit shared between multiple requestors and arbitration therefor
A multithreaded processor including a shared functional unit. In one embodiment, the multithreaded processor includes a functional unit coupled to a...
US-7,533,242 Prefetch hardware efficiency via prefetch hint instructions
A software agent assembles prefetch hint instructions or prefixes defined in an instruction set architecture, the instructions/prefixes conveying prefetch hint...
US-7,533,228 Two-pass sliding compaction
During two-pass sliding compaction, a heap may first be logically divided into fixed-sized segments, or chunks, and information regarding each chunk, known as...
US-7,533,225 Method and apparatus for enabling adaptive endianness
A method for reading a block, involving receiving a request to obtain the block, wherein the request comprises a block pointer, determining a block endianness by...
US-7,533,221 Space-adaptive lock-free free-list using pointer-sized single-target synchronization
Many conventional lock-free data structures exploit techniques that are possible only because state-of-the-art 64-bit processors are still running 32-bit...
US-7,533,218 Memory system topology
A memory subsystem. A memory subsystem includes a memory controller coupled to a processor and a plurality of N memory modules. The memory controller is directly...
US-7,533,212 System memory board subsystem using DRAM with integrated high speed point to point links
A memory system comprising memory modules including memory chips including integrated switching circuits. A memory controller coupled to the memory modules is...
US-7,533,210 Virtual communication interfaces for a micro-controller
A Compact Peripheral Component Interconnect (CPCI) system is provided that allows an Intelligent Platform Management Interface (IPMI) controller to be...
US-7,533,172 Advertisements for peer-to-peer computing resources
A system and method for providing advertisements in a peer-to-peer networking environment is described. In one embodiment, the peer-to-peer protocols may use...
US-7,533,168 Autonomic grid computing mechanism
An autonomic grid computing mechanism. In embodiments, peer-to-peer platform protocols may be integrated with a grid computing system. Embodiments may use...
US-7,533,161 System and method for multiplatform implementation of abstract software modules in peer-to-peer network...
System and method for multiplatform implementation of abstract software modules in peer-to-peer networking environments. A module class may have one or more...
US-7,533,156 Method and apparatus for RMI-IIOP implementation with java serialization
Method and apparatus for RMI-IIOP implementation using Java serialization as a data encoding mechanism. Embodiments may provide a mechanism to use Java...
US-7,533,141 System and method for unique naming of resources in networked environments
System and method for the unique naming of resources in networked environments including peer-to-peer network environments. Embodiments may be used to generate...
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