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Patent # Description
US-7,574,547 Ring counter based starvation free weighted priority encoded arbiter
The embodiments provide an arbiter in a microprocessor that can handle requests to access a shared resource from function units with different priorities without...
US-7,574,536 Routing direct memory access requests using doorbell addresses
An infrastructure element can receive a first DMA request including a first address and the data, generate a meta request that comprises a resource key value and...
US-7,574,523 Relay peers for extending peer availability in a peer-to-peer networking environment
A system and method for allowing peers to exchange messages with other peers independently of their network location in a peer-to-peer environment. Messages may...
US-7,574,413 System and method of discovering information
Embodiments of the present invention include the steps of (i) defining a first resource containing information objects defining a set of users; (ii) discovering...
US-7,574,344 Static timing based IR drop analysis
A method for determining a maximum IR drop on a power grid of a circuit is disclosed. The method includes dividing a reference timing signal into multiple bins....
US-7,574,077 Optical imaging device for optical proximity communication
An assembly comprising first and second electronic devices and an optical coupling device that optically couples an optical waveguide on the first electronic...
US-7,573,952 Barycentric coordinate technique for resampling quantized signals
One embodiment of the present invention provides a system that resamples a quantized signal. During operation, the system receives the quantized signal. Next,...
US-7,573,886 System and method for adaptive bandwidth determination
A method of determining effective bandwidth includes selecting a first packet size and sending a first packet having the first packet size from a first node to a...
US-7,573,720 Active socket for facilitating proximity communication
One embodiment of the present invention provides a system that facilitates capacitive communication between integrated circuit chips. The system includes a...
US-7,573,708 Upstream dust filters by retrofitting parallel path PCB cooling
An apparatus for cooling a computer system includes a fan for flowing an air to a first assembly and a second assembly, a first filter for filtering an air to a...
US-7,573,608 Method of estimating trap from spectral reflectance factor
A method of estimating the trap of an overprint of at least two primary colors from the spectral density curve of the overprint by computing the amounts of the...
US-7,571,468 Personal authorisation device
A personal authorisation device wearable by a user includes an input operable to receive data for authenticating a user, a memory operable to store validation...
US-7,571,434 Method and apparatus for transparent invocation of a characteristics extractor for pattern-based system design...
A method for analyzing a target system that includes obtaining a plurality of characteristics from the target system using a characteristics extractor and at...
US-7,571,354 System and method for request routing
A method and a system for request routing may include a router configured to forward a request to a process. The process may acquire a lock on a memory object....
US-7,571,347 Method and apparatus for providing fault-tolerance in parallel-processing systems
A system that provides fault tolerance in a parallel processing system. During operation, the system executes a parallel computing application in parallel across...
US-7,571,304 Generation of multiple checkpoints in a processor that supports speculative execution
One embodiment of the present invention provides a system which creates multiple checkpoints in a processor that supports speculative-execution. The system...
US-7,571,284 Out-of-order memory transactions in a fine-grain multithreaded/multi-core processor
A method and apparatus for implementing out-of-order memory transactions in a multithreaded, multicore processor. In the present invention, circular queue...
US-7,571,256 Data communication execution thread
Embodiments of the present invention provide for reliable receipt of data packets by a network device. The present invention also provides a receive thread for...
US-7,571,252 Computer system with multiple classes of transaction IDs
A computer system may include a sending device, a receiving device, and a network coupling the devices. The sending device may be configured to send a packet on...
US-7,571,231 Method and protocol for mediating communication between software applications
A method and protocol suitable for mediating communication between an application written in a platform independent language, running on a specific processor or...
US-7,571,227 Self-updating grid mechanism
A self-updating grid mechanism using peer-to-peer platform protocols. A compute node may send another node information about its compute node configuration using...
US-7,571,222 Network component identification
In a computer network, an object identifier relating to the identity of a network component is generated by applying an algorithm to manufacturer's data stored...
US-7,571,188 Cache abstraction for modeling database performance
A method for modeling a database management system involving receiving a query, computing a hit rate value associated with a cache, wherein the hit rate value is...
US-7,571,092 Method and apparatus for on-demand localization of files
Method and apparatus for the on-demand localization of files. Embodiments may provide a file format-independent localization mechanism that automates the...
US-7,571,059 Mechanism for determining an accelerated test specification for device elements
A mechanism is disclosed for determining an accelerated test for a device. The method comprises calculating an estimated amount of damage that an element of the...
US-7,570,760 Apparatus and method for implementing a block cipher algorithm
An apparatus and method for implementing a block cipher algorithm. In one embodiment, a cryptographic unit configured to implement a block cipher algorithm may...
US-7,570,537 Memory cells with power switch circuit for improved low voltage operation
Static random access memory (SRAM) cells and methods of operation are provided which may be used to provide improved writeability and stability to support low...
US-7,570,081 Multiple-output static logic
An approach is provided in embodiments of the present invention for building multiple-output static CMOS logic gate circuits that share transistors when...
US-7,568,197 Method and apparatus for interposing kernel symbols
In general, the invention relates to a method for loading a kernel module. The method involves loading a preload module into a kernel. Loading the preload module...
US-7,568,185 Mechanism for program-assisted tracing actions
A method for tracing an instrumented application, including loading the instrumented application into a kernel level to obtain a corresponding instrumented...
US-7,568,184 Software documentation generator
Various embodiments of a system and method for generating software documentation are disclosed. A software documentation generator may input a variety of...
US-7,568,092 Security policy enforcing DHCP server appliance
A method of allowing a remote device connected to a first network to access a second network, including leasing a leased network address to the remote device,...
US-7,568,089 Flag management in processors enabled for speculative execution of micro-operation traces
Managing speculative execution via groups of actions corresponding to atomic traces enables efficient processing of flag-related actions, as atomic traces...
US-7,568,088 Flag management in processors enabled for speculative execution of micro-operation traces
Managing speculative execution via groups of one or more actions corresponding to atomic traces enables efficient processing of flag-related actions, as atomic...
US-7,568,013 Multiple message send routine for network packets
A method for sending a plurality of messages to a plurality of recipients including obtaining the plurality of messages for the plurality of recipients, grouping...
US-7,567,985 Mechanism for implementing a sparse file system for an operating system partition
A mechanism is disclosed for implementing a sparse file system for an operating system partition. In one implementation, a non-global partition is created within...
US-7,567,567 Network system including packet classification for partitioned resources
A network system which includes a plurality of processing entities, an interconnect device coupled to the plurality of processing entities, a memory system...
US-7,567,124 Symmetrical differential amplifier
A differential amplifier has improved power efficiency, reduced offset penalty and a symmetrical output differential signal. Such a differential amplifier may...
US-7,566,275 Golf putting training apparatus
The present invention relates to a golf putting training apparatus comprising a reaction panel (2); a personal computer that computes detected data; a body...
US-7,565,647 Markup compiler that outputs MIDlets
A computing application for a mobile information device is generated from An extensible markup language, MIDML, in which different types of tags correspond to...
US-7,565,638 Density-based layer filler for integrated circuit design
A system and method for performing density-based layer filling on a design layout encoding of an integrated circuit device is disclosed. In some embodiments, the...
US-7,565,533 Systems and methods for providing object integrity and dynamic permission grants
Systems and methods for securing the content integrity of and access to object data and code in a distributed system. Content protecting URLs provide a mechanism...
US-7,565,526 Three component secure tunnel
Systems and methods are described for a secure tunnel. A method includes establishing a first connection (C.sub.IO) from an inner agent to an outer agent...
US-7,565,511 Working register file entries with instruction based lifetime
A technique for operating a computing apparatus includes allocating a working register file entry corresponding to a register in a working register file when an...
US-7,565,499 Method and apparatus for recording modified reference locations in garbage-collected heap memory
In a computer system with a garbage-collected heap memory, a cache of modified reference locations is associated with each application thread. The cache...
US-7,565,497 Coarse write barrier control mechanism
A method for a coarse write barrier control mechanism comprises maintaining a control table comprising a plurality of entries, where each entry may include an...
US-7,565,463 Scalable routing and addressing
PCI Express transactions can be transmitted via a shared PCI Express infrastructure. At an infrastructure ingress point an additional header comprising at least...
US-7,565,406 Last thread lock management for multi-threaded process and distributed data systems
A distributed data system may include nodes hosting at least one multi-threaded process operable to access portions of distributed data. A lock mechanism may...
US-7,565,364 Annotation processor discovery
Methods for discovering and accessing annotation processors are provided. The method initiates with identifying an annotation present in a source file and...
US-7,565,356 Liberty discovery service enhancements
A mechanism is disclosed for providing a user's web service provider's (WSP's) access information to a web service consumer (WSC). In one embodiment, a directory...
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