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Patent # Description
US-7,617,294 Method and apparatus for reducing latency involved in retrieving web page components
One embodiment of the present invention provides a system for reducing the latency in retrieving a web page. The system receives a request from a browser to...
US-7,617,273 Method and apparatus for providing a unified component architecture for client-side and server-side components
One embodiment of the present invention provides a system that facilitates deploying components on a client. During operation, the system establishes a...
US-7,617,264 Parallel remembered-set processing respecting popular-object detection
A garbage collector that operates in multiple threads divides a generation of a garbage-collected heap into heap sections, with which it associates respective...
US-7,616,926 Conductive DC biasing for capacitively coupled on-chip drivers
An integrated circuit containing a communication channel is described. This communication channel includes: a transmit circuit configured to transmit signals; a...
US-7,616,653 Network interface card aggregation framework
In general, in one aspect, the invention relates to a network interface card (NIC) aggregation framework, including a plurality of providers each configured to...
US-7,616,065 System and method for charge-pump with phase-frequency detection capability
A method of generating a correction signal for a voltage controlled oscillator (VCO) includes receiving a first signal in a correction current generator,...
US-7,615,110 Photoinitiators for use in intaglio printing inks
An intaglio printing ink, curing by free radical acrylate chemistry, which does not fluoresce in at least the visible region under ultraviolet light is prepared...
US-7,614,445 Enhanced heat pipe cooling with MHD fluid flow
A cooling apparatus includes a heat pipe base covering a heat source; a heat sink with a plurality of heat sink fins; a plurality of heat pipes connecting the...
US-D603,960 Rape prevention device
US-D603,654 Food container with shallow lid
US-7,614,056 Processor specific dispatching in a heterogeneous configuration
An abstraction layer is comprised in the operating system that represents the particulars of the PPMs. The abstractions in the abstraction layer are...
US-7,613,864 Device sharing
An interconnect apparatus, for example a switch, supports PCI-Express. The apparatus has a first plurality of ports configurable as upstream ports, each...
US-7,613,774 Chaperones in a distributed system
A method for approving a response or a decision of an observed node in a distributed system that includes generating at least one selected from the group...
US-7,613,762 Floating point remainder with embedded status information
A system for providing a floating point remainder comprises an analyzer circuit configured to determine a first status of a first floating point operand and a...
US-7,613,756 Random number generation apparatus and method
An apparatus and a method are provided for generating a random number, wherein the randomness of the random number is derived from thermal noise present across a...
US-7,613,580 Method and apparatus for generating an EMI fingerprint for a computer system
A system that generates an electromagnetic interference (EMI) fingerprint for a computer system is presented. During operation, the system executes a load script...
US-7,613,576 Using EMI signals to facilitate proactive fault monitoring in computer systems
A system that monitors electromagnetic interference (EMI) signals to facilitate proactive fault monitoring in a computer system is presented. During operation,...
US-7,613,198 Method and apparatus for dynamic assignment of network interface card resources
A method for dynamically changing a virtual network interface card (VNIC) binding. If the use of a hardware receive ring (HRR) is below the first threshold and...
US-7,613,132 Method and system for controlling virtual machine bandwidth
A method of controlling bandwidth including receiving and classifying a packet, sending the packet to a hardware receive ring based on a classification of the...
US-7,612,459 Multi-chip module and single-chip module for chips and proximity connectors
A single-chip module is described. The module includes a first semiconductor die having a first surface and a second surface. The first semiconductor die is...
US-7,612,122 Piperazino based photoinitiators
Compounds of formula (I): [where: the substituents R.sup.1 are individually selected from C.sub.1-C.sub.10 alkyl groups and optionally substituted benzyl groups;...
US-7,611,260 Protecting cover and LED lamp tube having the same
A light emitting diode (LED) lamp tube structure includes a tube, a circuit board, a plurality of LED lamps, two electric connectors and a protecting cover. The...
US-7,610,693 Tumble dryer dispenser
A device for treating fabrics in a tumble dryer comprising a reservoir for storing a fabric treatment composition and transfer device to expose fabric treatment...
US-D603,443 Eyeglass frame
US-D603,223 Food container with deep lid
US-D603,189 Eyeglass display
US-7,610,577 Method for developing platform independent launchable applications
A method, computer program product, and system for providing launchable application source code are presented. A determination is made regarding which target...
US-7,610,564 Displaying and browsing through a sparse view of content items in a hierarchy
One embodiment of the present invention provides a system that displays and facilitates browsing through a sparse view of content items in a hierarchy. First,...
US-7,610,523 Method and template for physical-memory allocation for implementing an in-system memory test
An in-system memory testing method includes transparently selecting and "stealing" a portion of memory from the memory system for running memory tests, then...
US-7,610,474 Mechanism for hardware tracking of return address after tail call elimination of return-type instruction
A technique maintains return address stack (RAS) content and alignment of a RAS top-of-stack (TOS) pointer upon detection of a tail-call elimination of a...
US-7,610,470 Preventing register data flow hazards in an SST processor
One embodiment of the present invention provides a system that prevents data hazards during simultaneous speculative threading. The system starts by executing...
US-7,610,431 Configuration space compaction
In an interconnect apparatus for interconnecting at least one host to at least a plurality of presentation registers provide a presentation interface for the...
US-7,610,425 Approach for managing interrupt load distribution
A method and apparatus for distributing multiple interrupts among multiple processors is disclosed. According to one embodiment, an interrupt daemon monitors the...
US-7,610,390 Distributed network identity
A distributed network identity is provided. An identity provider stores a portion of a user's personal information. A service provider accesses user information...
US-7,610,377 Overload management in an application-based server
An overload manager device including a monitoring function for evaluating successive values of the server operation parameter as a function of time, a first...
US-7,610,323 Method and apparatus for initializing interval computations through subdomain sampling
One embodiment of the present invention provides a system that uses a computer to evaluate a function within a domain using an interval computing technique....
US-7,610,305 Simultaneous global transaction and local transaction management in an application server
A system and a method for simultaneously managing a local transaction and a global transaction in an application server. In one embodiment, a system may manage a...
US-7,610,173 Technique for resolving "no-trouble-found" (NTF) events in electronic systems
A system that diagnoses a failure in a computer system is described. During operation, the system tests the computer system using a sequence of tests, where a...
US-7,609,636 System and method for infiniband receive flow control with combined buffering of virtual lanes and queue pairs
A system and method for implementing flow control, at the link and/or transport layers, for InfiniBand receive traffic. A shared memory structure may be used for...
US-7,609,213 Two-branch broadband antenna
A broadband antenna is capable of generating an upper resonant mode (at about 700 MHz) from a first radiating arm and a lower resonant mode (at about 500 MHz)...
US-7,609,092 Automatic phase-detection circuit for clocks with known ratios
An automatic phase detection circuit for generating an internal synchronization signal when two clock input signals achieve a certain phase relationship. No...
US-7,607,934 Instant insertion and extractable wire connector
This invention is to provide an instant insertion and extractable wire connector, comprising a shell, a clip, at least two wire extracting chunks, an insert and...
US-7,607,175 Techniques for permitting access across a context barrier on a small footprint device using an entry point object
A small footprint device can securely run multiple programs from unrelated vendors by the inclusion of a context barrier isolating the execution of the programs....
US-7,607,168 Network interface decryption and classification technique
Encrypted data packets are received by a network interface card. The network interface card, upon determining that the received data packets are encrypted,...
US-7,607,101 Method and apparatus for communicating using a display
Disclosed is a visual method of communicating an abnormal situation (e.g., the crashed or downed state) of the computer system including a display. The system...
US-7,607,069 Computer system including network slices that map to field replaceable units
In one embodiment, a computer system includes a first client subsystem, a second client subsystem and a network. The network is coupled to convey a packet...
US-7,607,046 System for predicting and preventing escalations
In one embodiment, a method and apparatus for predicting and preventing escalations is disclosed. The method includes generating a predictive model from analysis...
US-7,606,994 Cache memory system including a partially hashed index
In one embodiment, a cache memory system includes a cache memory coupled to a cache controller. The cache memory controller may receive an address and generate...
US-7,606,989 Method and apparatus for dynamically pre-tenuring objects in a generational garbage collection system
In a generational garbage collector, a decision is made to pre-tenure, or allocate new objects directly in the old generation, by a two step process. In the...
US-7,606,978 Multi-node computer system implementing global access state dependent transactions
A node in a multi-node system includes a memory, an active device that includes a cache, an interface that sends and receives coherency messages on an inter-node...
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