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Combined security device torch and compass
Recessed lamp socket system for illuminated decorative figures
A lamp socket system for an illuminated decorative figure includes a lamp socket with an integral male electrical plug and a flange for mounting the socket in a...
Methods and apparatus for creating a pending write-back controller for a
cache controller on a packet switched...
A write-back cache control system having a pending write-back cache controller in a multiprocessor cache memory structure. The processor subsystems in the...
Printed circuit board attachment mechanism
An improved attachment mechanism for attaching the motherboard in a computer system to its chassis is disclosed. The attachment mechanism includes a rail that...
Saving and restoring traversal state attributes of a directed acyclic
graph structure network for a parent...
A set in structure (SIS) list is established for each DAG structure of a DAG structure network. Additionally, a used before set (UBS) list is established for...
Extending computer architecture from 32-bits to 64-bits by using the
most significant bit of the stack pointer...
The present invention enables a computer system to store from register files to memory, and restore from memory back to the register files, data from programs...
Apparatus and method for managing the assignment of display attribute
identification values and multiple...
In a bit mapped display environment which has n hardware color look-up tables (CLUTs) where n=1 or more, which also has a limited number of Display Attribute...
Reset logic circuit and method
A high speed inverter circuit is disclosed. The inverter has a quiescent state, a set state for receiving an input pulse and generating a set pulse in response...
Translation lookaside buffer apparatus and method with input/output
entries, page table entries and page table...
A translation lookaside buffer for use with a virtual memory system including apparatus for storing virtual addresses, apparatus for storing a physical address...
High speed processing flip-flop
A high speed processing flip-flop contains a header circuit and a pulse flip-flop circuit. The header circuit is a clock pre-processing circuit that generates...
Managing display windows of inter-related applications using hollowed
In a computer controlled display system, a CPU is provided for generating a foreground and at least one background display windows on a display for a controlling...
Transient discriminate harmonics generator
A transient discriminate harmonics generator which receives an audio input signal and produces an output signal containing harmonics of the input signal. The...
Frequency discriminate leveler
A frequency discriminate leveler ("FDL") which controls its attack rate depending on the audio frequency to more perfectly preserve the natural sound of the...
Transparently self-configured option board using an option board
The present invention is an option board protocol (OBP) PROM for interfacing an optional peripheral device or board with a host computer system without...
Register allocation by decomposing, re-connecting and coloring
hierarchical program regions
During code generation, a routine is first decomposed into regions. Then, starting from the highest plateau, i.e. the inner most control flow level, the...
Apparatus for removing contaminants from waste fluids
The present invention provides a method for removing contaminants from a waste fluid stream. The method includes contacting a waste fluid stream with a promoter...
Microemulsion printing ink
A printing ink useful for "waterless" printing processes comprising a water-in-oil microemulsion wherein the water phase is present in an amount of about 5 to 20...
Method and system for the early detection of the jamming of a core
sampling device in an earth borehole, and...
A drill string having a core sampling device at its lower end is suspended in an earth borehole by a rotary drilling rig at the earth's surface. Drilling fluid...
Method and apparatus for key-management scheme for use with internet
protocols at site firewalls
The present invention includes a first data processing device (node I) coupled to a first private network and to a firewall server (FWA). Firewall server FWA is...
Catalytic oxidation of alkanes
Process and apparatus are provided for oxidation of oxidation of organic compounds in which a reaction zone is provided, containing an open space and a bed of...
Method for producing raisins
A method for producing natural, sun-dried raisins from the Thompson seedless grape variety in vineyards located in the Central Valley of California, or similarly...
Command preprocessor for a high performance three dimensional graphics
A command preprocessor is disclosed that translates geometry input data from differing formats into a standard format for accelerated rendering. The command...
Method and apparatus for resource constraint scheduling
Constrained resource allocation techniques are implemented with a digital computer due to its improved speed and graphics capability. These techniques allow for...
Method and apparatus for extensible object-oriented inter-application
A method and apparatus for extensible inter-application link management is disclosed. The apparatus is independent of the applications that manipulates the...
Processor having a stall cache and associated method for preventing
instruction stream stalls during load and...
A central processing unit of a computer system which has an arithmetic logic unit, a register file, an instruction decode/fetch instruction data unit, a bus...
Method and system for updating derived items in a view model which
includes multiple coordinate systems
A computer graphics interface between an application program and device pipeline. The computer system implements a view model including a plurality of coordinate...
Test mode readback in a memory display interface
A test mode read back function for verifying the functions of the memory display interface and a VRAM frame buffer coupled to the memory display interface,...
Electrochromic structures and methods
The invention provides for the simplified production of chromogenic devices, including relatively large scale devices in panel form. One or more of the layers of...
Personal security alarm
Word line decoder/driver circuit and method
A row select circuit for semiconductor memories is disclosed. The row select circuit includes a decoder portion and a driver portion. The decoder potion of the...
Brackets and levers for installing and maintaining motherboards in
In a computer system requiring the CPU board to be installed and removed from the top of the chassis, there is included a CPU board installation and maintaining...
Recreational boot length ski device
A recreational boot attachment (10) adapts a boot (50) for sliding on snow, ice, and other natural and artificial surfaces. The ski device is constructed with a...
Personal security alarm
Methods and apparatus for improving cache consistency using a single
copy of a cache tag memory in multiple...
Apparatus and methods for a cache controller to maintain cache consistency in a cache memory structure having a single copy of a cache tag memory while...
High-moisture raisins for use in food processing
Raisins are preconditioned for use in food preparations where a high moisture content is required, by exposing the raisins to heated water or steam to elevate...
Method and apparatus for a secure protocol for virtual memory managers
that use memory objects
The present invention is a method and apparatus for efficiently using existing cache memory in a virtual memory computer system for servicing different demands...
Metal-ligand catalyzed decomposition of organic hydroperoxides
Organic hydroperoxides are decomposed by drying a reaction mixture containing the organic hydroperoxide and an organic solvent and contacting the dried reaction...
Process for the production of stable high wax content vinyl latices
Stable, compatible, resin fortified aqueous vinyl polymer emulsions that are rich in wax are prepared in a method comprising a first polymerization of a mixture...
Four course disk enclosure
Programmable memory timing method and apparatus for programmably
generating generic and then type specific...
The present invention operates within a data processing system with multiple DRAM memory modules, providing programmable memory timing through the use of a RAM...
Fully testable chip having self-timed memory arrays
A method and apparatus is provided for testing self timed memory arrays which does not affect the state of cells within the arrays not being tested. Each memory...
Method and apparatus for generating high resolution 3D images in a head
tracked stereo display system
A head tracked stereo display system for generating virtual images over a wide range of viewer head movement, and for intermixing light from virtual objects and...
Tab semiconductor package with cushioned land grid array outer lead bumps
A film of elastomeric material is used to laminate the tape with LGA outer lead bumps to the stiffner plate of the semiconductor package. The elastomeric...
Source synchronized metastable free bus
The bus of the present invention advantageously utilizes high-speed, source synchronized data transfers and lower-speed, globally synchronized transfers of...