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Patent # Description
US-5,528,165 Logic signal validity verification apparatus
A logic signal validity verifier for use in determining the validity of the logic states of a group of logic signals includes an inactive signal fault monitor...
US-5,528,083 Thin film chip capacitor for electrical noise reduction in integrated circuits
An integrated circuit chip and flat capacitor assembly are connected with short bonding wires to reduce electrical noise. A flat chip capacitor is coupled to the...
US-D370,686 Grip-head handle
US-5,524,195 Graphical user interface for interactive television with an animated agent
A graphical user interface for displaying and selecting video programs, such as video on demand, includes a video on demand server coupled to a communication...
US-5,521,874 High speed differential to single ended sense amplifier
A differential to single ended sense amplifier utilizes a minimum number of stages to convert a differential input signal received from complementary bit lines...
US-5,520,236 Greenhouse curtain system
A novel greenhouse curtain system has a plurality of movable curtains oriented vertically one above the other to form a flexible wall. Each curtain is supported...
US-5,520,217 Directional valve
A solenoid operated directional valve including a main section having a reciprocally mounted main fluid controlling valving member moveable between three...
US-5,519,851 Portable PCMCIA interface for a host computer
A portable PCMCIA interface for a host computer having a system bus. In one embodiment, the host computer is a SPARC based computer having an SBus and running...
US-5,519,825 Method and apparatus for NTSC display of full range animation
Full-motion animation video is displayed in a computer system through use of sprite objects. The sprite objects define the images on the output display, and the...
US-5,519,715 Full-speed microprocessor testing employing boundary scan
A method is disclosed for loading a compiled test program into a microprocessor's internal caches and then controlling the execution of that program. Initially,...
US-5,517,611 Floating-point processor for a high performance three dimensional graphics accelerator
A floating-point processor implements specialized graphics micro instructions. The specialized graphics micro instructions include a swap micro instruction which...
US-5,517,133 Multiple-input OR-gate employing a sense amplifier
The multiple-input OR-gate includes a set of pull down transistors connected in parallel to a common signal line. A pair of first and second inverters are...
US-5,517,130 Method and structure for reducing noise in output buffer circuits
A method and structure for controlling ground bounce and power supply noise during switching is provided in which a plurality of pull-up and/or pull-down...
US-5,516,964 Hydrocarbon isomerization using solid superacid catalysts comprising platinum metal
An isomerization process is provided which process utilizes a sulfated solid catalyst comprising (1) oxide or hydroxide of Group III or Group IV element, e.g....
US-5,515,538 Apparatus and method for interrupt handling in a multi-threaded operating system kernel
The disclosed invention is a method and apparatus for use in handling interrupts in a data processing system where the kernel is preemptible, has real-time...
US-5,515,509 Method and apparatus for implementing self-organization in a wireless local area network
A method and apparatus for implementing self-organization in a wireless local area network ("LAN"). Each LAN is divided into a plurality of cells. Each cell is...
US-5,513,360 Computer microphone powered by internal battery or computer hardware
A computer microphone with a dual power source capability is disclosed. This dual power source capability allows the microphone to receive power from an internal...
US-5,513,192 Fault tolerant disk drive system with error detection and correction
A fault tolerant, magnetic disk drive array with error detection and correction. The present invention performs vertical parity checks and one or two additional...
US-5,513,186 Method and apparatus for interconnect testing without speed degradation
A method and apparatus is disclosed for advantageously implementing a full boundary scan test of input and bi-directional paths of an integrated circuit. The...
US-5,512,918 High speed method and apparatus for generating animation by means of a three-region frame buffer and associated...
A method and apparatus for quickly copying a first frame region into a second frame region. A video memory array comprising a plurality of video random access...
US-5,512,780 Inorganic chip-to-package interconnection circuit
An inorganic chip-to-package interconnection circuit is described. The circuit has a set of electrical conductors that are held together by a set of insulating...
US-5,512,420 Waterless presensitized plate comprising four layers
A camera speed lithographic plate precursor composition is used for the preparation of waterless, imaged printing plates. The plates comprise a solid substrate...
US-5,510,733 High speed circuit with CMOS and bipolar logic stages
An integrated circuit includes a bipolar logic stage and a CMOS logic stage. The bipolar logic stage includes a common emitter line positioned along a central...
US-5,510,732 Synchronizer circuit and method for reducing the occurrence of metastability conditions in digital systems
A digital system including a synchronizer circuit which significantly reduces the occurrence of metastability conditions during data transfer between a first...
US-5,510,558 Oxidative dehydrogenation of hydrocarbons with active carbon catalyst
Oxidative dehydrogenation of alkanes and alkylaromatic hydrocarbons is achieved by contact with an active carbon catalyst. In various aspects of the invention,...
US-5,509,130 Method and apparatus for grouping multiple instructions, issuing grouped instructions simultaneously, and...
In a pipelined processor, an instruction queue and an instruction control unit is provided to group and issue m instructions simultaneously per clock cycle for...
US-5,506,969 Method and apparatus for bus bandwidth management
A computer system includes bus bandwidth management for operation of a high-speed bus. The high-speed bus is coupled to a plurality of modules. A plurality of...
US-5,504,855 Method and apparatus for providing fast multi-color storage in a frame buffer
A frame buffer for accelerating the display of graphics data on an output display device which frame buffer includes a pair of color value registers each of...
US-5,504,700 Method and apparatus for high density sixteen and thirty-two megabyte single in-line memory module
The invention provides a method and apparatus for a memory device interface between a memory device and a CPU as well as the dimensions of the memory device. An...
US-5,503,472 Method and apparatus for assembly of a multi-disk pack unit
An apparatus and method are disclosed for minimizing the space required for a disk drive housing by mounting a disk drive unit in an enclosure of minimum size,...
US-5,502,837 Method and apparatus for clocking variable pixel frequencies and pixel depths in a memory display interface
A method and apparatus for synchronizing pixel data flow within a memory display interface (MDI) to enable variable pixel depths, and to support display devices...
US-5,502,211 Substituted dipyrromethanes and their preparation
New chemical compounds, bis(pyrrol-2-yl)halocarbylmethanes, also known as meso-halocarbyl dipyrromethanes, are made by recting pyrrole in either of two reaction...
US-5,500,818 Method and apparatus for providing accurate T(on) and T(off) times for the output of a memory array
A frame buffer including an array of memory cells, circuitry for accessing the memory cells to derive selected pixel data, and output circuitry for providing...
US-D367,846 Vehicle starter cable
US-5,497,480 Broadcast demap for deallocating memory pages in a multiprocessor system
A method and apparatus for removing a page table entry from a plurality of translation lookaside buffers ("TLBs") in a multiprocessor computer system. The...
US-5,497,470 Method and apparatus for providing a high through put cache tag controller
A cache tag controller for a cache tag memory for receiving multiple consecutive cache tag modify operations through a system bus to update cache tags in the...
US-5,495,191 Single ended dynamic sense amplifier
A single-ended sense amplifier circuit for sensing the state of a bitline in a read-only memory. The sense amplifier includes an output circuit having an input...
US-5,494,571 Naphtha upgrading using solid superacid catalysts comprising platinum metal
A naphtha upgrading process is provided which process utilizes a sulfated solid catalyst comprising (1) oxide or hydroxide of Group III or Group IV element, e.g....
US-5,494,569 Hydrocracking using solid superacid catalysts comprising platinum metal
A hydrocracking process is provided which process utilizes a sulfated solid catalyst comprising (1) oxide or hydroxide of Group III or Group IV element, e.g....
US-5,493,672 Concurrent simulation of host system at instruction level and input/output system at logic level with two-way...
A method and apparatus is provided for integrating a logic level simulation with an instruction level simulation for more accurate and faster system level...
US-5,493,067 Solid superacid alkylation catalyst compositions and alkylation method using the same
Isoparaffins and olefins are alkylated by contact with a solid superacid such as sulfated zirconia optionally containing added metals, and containing added...
US-D367,277 Portable radio
US-5,491,278 Alkylation process using solid superacid catalyst liquid phase
Isoparaffins and olefins are alkylated in the liquid phase by contact with a solid superacid such as sulfated zirconia containing heteropolyacids or ...
US-D367,090 Seat for an exerciser
US-5,489,722 Dehydrogenation processes using catalysts comprising catalytic metal on a nonacidic support
Organic compounds are dehydrogenated by contact with a catalyst prepared by oxidizing and then sulfiding a composition comprising Group VIIIA (first or second...
US-5,489,716 Reactions catalyzed by haloporphyrins
The invention provides novel methods for the oxidation of hydrocarbons with oxygen-containing gas to form hydroxy-group containing compounds and for the...
US-5,488,539 Protecting cot packaged ICs during wave solder operations
A method and apparatus is disclosed for protecting a solder pad for a chip on tape packaged integrated circuit mounted on a surface of a printed circuit board...
US-5,485,106 ECL to CMOS converter
An efficient high-speed ECL to CMOS logic converter for BiCMOS integrated circuits. In one embodiment, a differential amplifier compares an ECL input signal to...
US-5,485,077 Concentric servo voltage regulator utilizing an inner servo loop and an outer servo loop
The present invention is a concentric servo method and apparatus using two servo loops to control and stabilize the output of an electronic voltage regulator. An...
US-5,483,600 Wave dependent compressor
An audio compressor using interactive layered time constants to create an easy to use compressor which self adapts to the program characteristics and provides a...
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