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A simulator is described in which the simulator can flashback to simulate events that in simulated time actually occurred earlier than other events already...
Scoreboard table for a counterflow pipeline processor with instruction
packages and result packages
A counterflow pipeline having a scoreboard table and a register file is disclosed. In the counterflow pipeline, information flows in two directions. Instructions...
Apparatus and method for high speed shifting of test data through an
High speed shifting of test data through an integrated circuit is achieved by modifying the output portion of a circuit, while still observing relevant test...
Secure network protocol system and method
A computer network having first and second network entities. The first network entity includes a packet object generator that generates a packet object including...
Method and apparatus for asynchronously segmenting packets of multiple
channels into ATM cells
A network interface card (NIC) is provided with a transmit unload block for asynchronously segmenting packet data into ATM cells for packets of multiple...
Card guide with groove having a base portion and ramped portion which
restrains an electronic card
A card guide that both restrains an installed electronic card and allows the card to be inserted into a computer chassis in a direction that is parallel to the...
Method and apparatus for efficient self testing of on-chip memory
An electronic device and method for utilizing two extra microcode instructions to generate a set of test patterns which provide complete bitwise self-testing of...
Solar device for cooking or sterilizing and method or use thereof
A solar energy collector for cooking food or sterilizing liquids or articles is described, which may be fixed in place or portable. The device includes a heating...
Method and apparatus for coordinating data transfer between hardware and
software by comparing entry number of...
A method and apparatus of coordinating data transfer between hardware and software in a computer system through the use of a semaphore mechanism is disclosed....
Method and apparatus for a fast debugger fix and continue operation
This Continuation-In-Part describes a part of this run-time debugger operation which is designated the "Fix-and-Continue" invention. This invention permits a...
Augmenting volume management of information storage devices to handle
direct access to storage devices
A computing system operates a volume management system to manage accesses to the storage of information and provides to the users of the volume management system...
Cache memory system with independently accessible subdivided cache tag
Two independently accessible subdivided cache tag arrays and a cache control logic is provided to a set associative cache system. Each tag entry is stored in two...
Scatter load for system test
Software systems such as file systems in a computer are tested by scatter load testing. Scatter load testing is accomplished by the computer system applying...
Method and apparatus for extensible type-specific data presentation by a
The present invention provides an economical, high performance, adaptable system and method for a type-specific data presentation by a development tool. In the...
Method and apparatus for performing on-chip measurement on a component
The system of the present invention includes programmable logic to generate watchpoint traps which cause a branch to determined trap code and breakpoint signals...
Apparatus and method identifying false timing paths in digital circuits
A method for identifying false paths in a digital circuit. A list of paths corresponding to the digital circuit is either provided or generated. For each path,...
High speed serial link for fully duplexed data communication
A system for converting between parallel data and serial data is described. In the system (10), individual bits of the parallel data (12) are latched into...
Fast access memory array
A memory array with improved access time is disclosed. In one embodiment, the memory array includes a plurality of memory cells arranged in rows and columns....
Low-loss, low-inductance interconnect for microcircuits
A low-loss, low-inductance metal interconnect for an electrical signal in a microcircuit comprises a plurality of spaced-apart generally parallel metal...
Verification of network transporter in networking environments
A method and an apparatus for verifying a network transporter under test which is able to perform the test and produce test results by posting test packets...
Loopback video preview for a computer display
A video adapter and computer/video system generate a video output signal having a first format useable by other video equipment. This signal is then looped back...
PCI expansion card double-door retainer
Computers are manufactured with connectors in which are inserted at least one PCI expansion card to increase the capacity of the computer. A computer enclosure...
Process for increased yields of oxygenated products in two-step
oxidation of hydrocarbons
The invention comprises a method for the catalytic conversion of alkanes and alkylhydroperoxides to oxygenates, particularly alcohols, comprising the oxidation...
Ghost-like decorative object
Decorative structures comprising a flexible sheet-like member simulate universal conceptions of the appearance of floating and fixed ghosts. A structure for...
Sliding door handle
Error injection to a behavioral model
A method and an apparatus for a dynamic error injection mechanism used in conjunction with a behavioral simulator in testing simulated hardware and software, and...
Shared rounding hardware for multiplier and divider/square root unit
using conditional sum adder
A floating point mantissa final addition and rounding unit uses a conditional sum adder to reduce a redundant carry-save format 106-bit mantissa to a...
Regulated complementary charge pump with imbalanced current regulation
and symmetrical input capacitance
A CMOS regulated complementary charge pump circuit uses imbalanced current regulation and symmetrical capacitive loading of input signals to provide a...
Primer solution composition for dental bonding
A primer composition for the treatment of a tooth surface, which comprises a) at least one metal compound selected from the group consisting of an iron compound,...
System and method for pre-verification of stack usage in bytecode
The present invention provides a verifier for use in conjunction with programs utilizing data type specific bytecodes for verifying the proper operation of the...
Method and apparatus for stepping pair keys in a key-management scheme
A method and apparatus for generating additional implicit keys from a key [K.sub.ij ].sub.N without the necessity of generating a new Diffie-Helman (DH)...
Flip-flop with full scan capability
A flip-flop with scan capability includes a four switches, a master stage, a slave stage and a scan-out logic gate. The flip-flop can operate in a functional...
Combined computer housing and stand therefor
System and method for testing the operation of registers in digital
A new register test system and method is provided for testing a register. The register under test has a number of bit storage locations, each of which is...
Computer system enclosure
Method and apparatus for automating the localization of a computer
The present invention provides a system and process which has the advantages of shortening the time and cost required to create a new localized version of a...
Method and apparatus for automatic selection of the load latency to be
used in modulo scheduling in an...
Apparatus and methods are disclosed for determining a load latency value to use in scheduling instructions for a target program, (the load latency value is the...
Dual mode arbitration apparatus and method for reducing latency by
allowing the possibility of simultaneous...
A method and apparatus for reducing arbitration latency. A fast mode is defined to allow simultaneous request and access to a shared resource. A slow mode is...
Buffering of data for transmission in a computer communication system
A transmission data buffer and method for buffering data to be transmitted from a host computer to an asynchronous transfer mode (ATM) telecommunications...
Checksum generation circuit and method
A circuit and method for generating a checksum for a TCP packet on the fly. A stream of 32-bit data words from a TCP packet is split into two 16-bit data word...
Haloporphyrins and their preparation and use as catalysts
The invention provides novel catalyst compositions, useful in the oxidation of hydrocarbons with air or oxygen to form hydroxy-group containing compounds and in...
A portable aspirator having a rigid lightweight housing fabricated by rotational molding. The housing has a smooth outer surface to allow for the easy cleaning...
Insect repelling cat litter
An insect repellent-containing clay litter material capable of retaining the insect repellent until wetted and then releasing the insect repellent to nearby...
Low inductance termination resistor arrays
An array of termination resistors has symmetrical geometry producing essentially no net magnetic field and a resultant low inductance is fabricated on a...
Dynamic phase-frequency detector circuit
A sequential phase-frequency detector circuit using precharged logic and a minimum number of transistors is suitable for use in a delay locked loop because of...
Interrupt modular for receiving bursty high speed network traffic
Interrupts are presented to a processor to indicate the arrival of data packets from a high speed network. The rate of packet arrival interrupts is modulated to...
Method and apparatus for an improved optimizing compiler
An optimizing compiler process and apparatus is disclosed for more accurately and efficiently identifying live variable sets in a portion of a target computer...