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Apparatus and method identifying false timing paths in digital circuits
A method for identifying false paths in a digital circuit. A list of paths corresponding to the digital circuit is either provided or generated. For each path,...
High speed serial link for fully duplexed data communication
A system for converting between parallel data and serial data is described. In the system (10), individual bits of the parallel data (12) are latched into...
Fast access memory array
A memory array with improved access time is disclosed. In one embodiment, the memory array includes a plurality of memory cells arranged in rows and columns....
Low-loss, low-inductance interconnect for microcircuits
A low-loss, low-inductance metal interconnect for an electrical signal in a microcircuit comprises a plurality of spaced-apart generally parallel metal...
Verification of network transporter in networking environments
A method and an apparatus for verifying a network transporter under test which is able to perform the test and produce test results by posting test packets...
Loopback video preview for a computer display
A video adapter and computer/video system generate a video output signal having a first format useable by other video equipment. This signal is then looped back...
PCI expansion card double-door retainer
Computers are manufactured with connectors in which are inserted at least one PCI expansion card to increase the capacity of the computer. A computer enclosure...
Process for increased yields of oxygenated products in two-step
oxidation of hydrocarbons
The invention comprises a method for the catalytic conversion of alkanes and alkylhydroperoxides to oxygenates, particularly alcohols, comprising the oxidation...
Ghost-like decorative object
Decorative structures comprising a flexible sheet-like member simulate universal conceptions of the appearance of floating and fixed ghosts. A structure for...
Sliding door handle
Error injection to a behavioral model
A method and an apparatus for a dynamic error injection mechanism used in conjunction with a behavioral simulator in testing simulated hardware and software, and...
Shared rounding hardware for multiplier and divider/square root unit
using conditional sum adder
A floating point mantissa final addition and rounding unit uses a conditional sum adder to reduce a redundant carry-save format 106-bit mantissa to a...
Regulated complementary charge pump with imbalanced current regulation
and symmetrical input capacitance
A CMOS regulated complementary charge pump circuit uses imbalanced current regulation and symmetrical capacitive loading of input signals to provide a...
Primer solution composition for dental bonding
A primer composition for the treatment of a tooth surface, which comprises a) at least one metal compound selected from the group consisting of an iron compound,...
System and method for pre-verification of stack usage in bytecode
The present invention provides a verifier for use in conjunction with programs utilizing data type specific bytecodes for verifying the proper operation of the...
Method and apparatus for stepping pair keys in a key-management scheme
A method and apparatus for generating additional implicit keys from a key [K.sub.ij ].sub.N without the necessity of generating a new Diffie-Helman (DH)...
Flip-flop with full scan capability
A flip-flop with scan capability includes a four switches, a master stage, a slave stage and a scan-out logic gate. The flip-flop can operate in a functional...
Combined computer housing and stand therefor
System and method for testing the operation of registers in digital
A new register test system and method is provided for testing a register. The register under test has a number of bit storage locations, each of which is...
Computer system enclosure
Method and apparatus for automating the localization of a computer
The present invention provides a system and process which has the advantages of shortening the time and cost required to create a new localized version of a...
Method and apparatus for automatic selection of the load latency to be
used in modulo scheduling in an...
Apparatus and methods are disclosed for determining a load latency value to use in scheduling instructions for a target program, (the load latency value is the...
Dual mode arbitration apparatus and method for reducing latency by
allowing the possibility of simultaneous...
A method and apparatus for reducing arbitration latency. A fast mode is defined to allow simultaneous request and access to a shared resource. A slow mode is...
Buffering of data for transmission in a computer communication system
A transmission data buffer and method for buffering data to be transmitted from a host computer to an asynchronous transfer mode (ATM) telecommunications...
Checksum generation circuit and method
A circuit and method for generating a checksum for a TCP packet on the fly. A stream of 32-bit data words from a TCP packet is split into two 16-bit data word...
Haloporphyrins and their preparation and use as catalysts
The invention provides novel catalyst compositions, useful in the oxidation of hydrocarbons with air or oxygen to form hydroxy-group containing compounds and in...
A portable aspirator having a rigid lightweight housing fabricated by rotational molding. The housing has a smooth outer surface to allow for the easy cleaning...
Insect repelling cat litter
An insect repellent-containing clay litter material capable of retaining the insect repellent until wetted and then releasing the insect repellent to nearby...
Low inductance termination resistor arrays
An array of termination resistors has symmetrical geometry producing essentially no net magnetic field and a resultant low inductance is fabricated on a...
Dynamic phase-frequency detector circuit
A sequential phase-frequency detector circuit using precharged logic and a minimum number of transistors is suitable for use in a delay locked loop because of...
Interrupt modular for receiving bursty high speed network traffic
Interrupts are presented to a processor to indicate the arrival of data packets from a high speed network. The rate of packet arrival interrupts is modulated to...
Method and apparatus for an improved optimizing compiler
An optimizing compiler process and apparatus is disclosed for more accurately and efficiently identifying live variable sets in a portion of a target computer...
Method and system for implementing hypertext scroll attributes
Embodiments of the present invention use a new extension to the HTML language to support remotely specified named anchors. A remotely specified named anchor,...
Electrochromic structures and methods
Electrochromic devices applied to a substrate are disclosed, including an electrochromic electrode layer, a counterelectrode layer, and an ion-conducting layer...
Method and apparatus for reducing electromagnetic interference radiated
by flat panel display systems
Electromagnetic interference ("EMI") generated by a flat panel video display system is reduced by periodically phase/modulating the panel clock. This spreads EMI...
Preparation of porphyrins and their metal complexes
A hydroxyl-containing pyrrolic compound having a hydroxyl group or a hydroxyl-containing group in the 2-position, optionally substituted in the beta positions,...
Flexible packaging printing ink
An improved flexible packaging ink comprising a polyamide resin prepared by condensing a dibasic acid mixture with a diamine mixture, a pigment, nitrocellulose...
Computer peripherals housing
Computer system enclosure
Memory transaction execution system and method for multiprocessor system
having independent parallel...
A multiprocessor computer system is provided having a multiplicity of sub-systems and a main memory coupled to a system controller. An interconnect module,...
Multiport register file memory cell configuration for read operation
A mulitport register file including a memory cell array having a plurality of addressable memory locations and N bit lines associated with each memory cell in...
Method & apparatus for a power management pseudo-device driver
A power management system for conserving power in a computer system that runs the UNIX.RTM. operating system. The power management system comprises a power...
Method and apparatus for encoding data to be self-describing by storing
tag records describing said data...
A computer-implemented method and apparatus in a computer system of processing data generated by a first application program in a second application program...
Transaction activation processor for controlling memory transaction
execution in a packet switched cache...
A multiprocessor computer system has a multiplicity of sub-systems and a main memory coupled to a system controller. Some of the sub-systems are data processors,...
Method and apparatus for providing operations affecting a frame buffer
without a row address strobe cycle
A frame buffer designed to allow frame buffer operations which do not involve new row addresses to be accomplished without the need for a RAS cycle. The...
Fiber optics illuminator system
An optical fiber illuminator system in which a stream of air under the urging of an air moving device such as a fan is drawn in through an air intake zone and...
Key restricting device
A voluntary key restricting device attached to the interior side of an entry door to prevent the unlocking of a cylinder locking dead bolt mechanism by any...
Refreshing a dynamic random access memory utilizing a mandatory or
A data processing system which utilizes dynamic memory that requires periodic refreshment includes a processor coupled to a memory controller which is in turn...