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Patent # Description
US-5,793,365 System and method providing a computer user interface enabling access to distributed workgroup members
A system and method provides each networked computer user with a user interface displaying visual representations of selected other computer users, generally of...
US-5,793,233 Apparatus and method for generating a phase detection signal that coordinates the phases of separate clock signals
A phase detection signal is generated with a phase detection logic pipeline and its associated tapped pipeline signal combinational logic circuit. The phase...
US-5,790,974 Portable calendaring device having perceptual agent managing calendar entries
A personal calendaring system includes a portable calendaring system and a complementary office calendar system, each synchronizing calendar entries by two-way...
US-5,790,949 Paging device with ability to automatically connect by telephone a person initiating a page request to the...
A paging system communicatively connects a first user initiating a page request using a first telephone to a second user receiving the page request using a...
US-5,790,890 Identification interface
An identification interface that transfers control information between a controller and an option module coupled to a motherboard of a computer. The...
US-5,790,865 Method and apparatus for reordering components of computer programs
A method and system for reordering sections of a computer program are disclosed. The computer program is executed during an experimental execution period. During...
US-5,790,861 Method and apparatus for generating executable code from object-oriented C++ source code
The present invention provides an improved method and apparatus for generating executable computer code for an application program written in C++ source code. In...
US-5,790,855 System, method and article of manufacture for type checking appropriateness of port connection and variable...
Method, system and article of manufacture for connecting multiport object oriented components for use in an object oriented based applet or application. The...
US-5,790,829 Event synchronization mechanism
A computer process determines that processing by a resource manager of all previously sent event structures has been completed by sending a tag event structure...
US-5,790,827 Method for dependency checking using a scoreboard for a pair of register sets having different precisions
A dependency checking method includes a scoreboard which records destination operands of instructions outstanding within the pipeline of a microprocessor. Each...
US-5,790,795 Media server system which employs a SCSI bus and which utilizes SCSI logical units to differentiate between...
A media server system including a media server coupled through a SCSI bus to one or more MPEG decoder boxes. Each of the MPEG decoder boxes includes a plurality...
US-5,790,669 Lightweight non-repudiation system and method
A system and method is disclosed that provides lightweight non-repudiability for networked computer systems. Each party to a two-party communication maintains...
US-5,790,446 Floating point multiplier with reduced critical paths using delay matching techniques
A floating point multiplier with partial support for subnormal operands and results uses radix-4 or modified Booth encoding and a binary tree of 4:2 compressors...
US-5,790,425 Generic server benchmarking framework in a client-server environment
A computer implemented framework method for server benchmarking in a client server environment including a server and at least one client system is provided. The...
US-5,790,136 Interleaving pixel data for a memory display interface
A method and apparatus is disclosed for interleaving the transfer of pixel data from a dual bank frame buffer to a memory display interface. The interleaved...
US-5,789,986 Frequency controlled bias generator for stabilizing clock generation circuits
The present invention is a frequency controlled bias generator for stabilizing clock generation circuits. The invention includes a Bias VCO and a clock feedback...
US-5,787,466 Multi-tier cache and method for implementing such a system
A multi-tier cache system and a method for implementing the multi-tier cache system is disclosed. The multi-tier cache system has a small cache in random access...
US-5,787,447 Memory allocation maintaining ordering across multiple heaps
A method and apparatus for adding and deleting data in a plurality of heaps stored in memory, where the ordering of the data in the heaps is maintained across...
US-5,787,385 Computer controlled laser fog tracking
A scanning transmissometer is disclosed for use with a large number of reflectors for detecting dense, but very localized patches of fog to permit warnings to be...
US-5,787,251 Method and apparatus for subcontracts in distributed processing systems
The present invention provides an elegant and simple way to provide mechanisms for invocation of objects by client applications and for argument passing between...
US-5,787,030 Correct and efficient sticky bit calculation for exact floating point divide/square root results
Quotient digit selection logic is modified so as to prevent a partial remainder equal to the negative divisor from occurring. An enhanced quotient digit...
US-5,787,012 Integrated circuit with identification signal writing circuitry distributed on multiple metal layers
An integrated circuit includes a first metal layer with first layer identification signal writing circuitry connections to produce first metal layer circuit...
US-5,786,815 Configurable runtime graphical user interface widget management
A method facilitating modification of an application's graphical user interface (GUI), particularly by application end-users. In particular, the method permits...
US-5,786,715 Programmable digital frequency multiplier
A programmable digital frequency multiplier includes either a delay locked loop with an input clock or a ring oscillator which generates multiple phase delayed...
US-5,784,707 Method and apparatus for managing virtual computer memory with multiple page sizes
A computer system having virtual memory that can be mapped using multiple page sizes onto logically addressable physical memory. An intermediate addressing...
US-5,784,608 Hypertext information retrieval using profiles and topics
A computer-implemented method and system for of retrieving information. A first file of information is received which includes a first markup language to...
US-5,784,603 Fast handling of branch delay slots on mispredicted branches
An apparatus and method for quickly and efficiently handling mispredicted branch instructions in a computer processor having multiple instruction execution...
US-5,784,600 Method of generating exact-length wires for routing critical signals
Disclosed is an automated method for adjusting wire lengths between connected circuit elements of an integrated circuit. The method includes the following steps:...
US-5,784,588 Dependency checking apparatus employing a scoreboard for a pair of register sets having different precisions
A dependency checking apparatus includes a scoreboard which records destination operands of instructions outstanding within the pipeline of a microprocessor....
US-5,784,559 Full duplex flow control for ethernet networks
CSMA/CD is used to implement flow control in a full-duplex Ethernet network in a lossless fashion. Uniquely identifiable flow control transmit on/off ...
US-5,784,058 User-controllable persistent browser display pages
The present invention provides a user control mechanism for selectively retaining for display a document obtained from a network. The user control is located as...
US-5,784,056 System and method for temporally varying pointer icons
A system and method for computer operation. An object to be pointed to in a user's computer display (109) is indicated with an animated pointer icon (113). In a...
US-5,783,953 CMOS current controlled delay element using cascoded complementary differential amplifiers with replicated bias...
A cascoded cmos differential delay element is described. The delay element provides a controlled delay useful in forming voltage controlled oscillators or other...
US-5,783,812 Linear CCD hand held bar code reader with vibrator
A linear CCD hand held bar code reader which includes a vibrator to provide a vibration signal when the reader completes a reading of a bar code is described. A...
US-D396,225 Computer screen with a set of icons
US-D396,224 Computer screen with a set of icons
US-5,781,924 Computer caching methods and apparatus
When cache misses occur simultaneously on two or more ports of a multi-port cache, different replacement sets are selected for different ports. The replacements...
US-5,781,781 Computer system including a novel CMOS voltage regulator
In accordance with the teachings of this invention, a novel voltage regulator is taught which is capable of being formed solely of MOS devices. This eliminates...
US-5,781,721 Method and apparatus for testing cache RAM residing on a microprocessor
An apparatus and method for enabling a cache controller and address and data buses of a microprocessor with an on-board cache to provide a SRAM test mode for...
US-5,781,633 Capability security for transparent distributed object systems
A system providing capability security for distributed object systems is disclosed. The basic tenet of capability security is that the right to do something to...
US-5,781,568 Error detection and correction method and apparatus for computer memory
An S8ED system is implemented in a memory system to detect single errors involving one or more bits in a byte of subject data, stored in and retrieved from the...
US-5,781,055 Apparatus and method for instantaneous stretching of clock signals in a delay-locked loop multi-phase clock...
An apparatus and method for instantaneously stretching multi-phase clock signals includes a delay line to generate a plurality of multi-phase clock signals. An...
US-5,780,930 Method for direct attachment of an on-chip bypass capacitor in an integrated circuit
Switching noise at integrated circuit V.sub.DD and V.sub.SS metal traces is reduced by minimizing lead inductance in on-chip bypass capacitors. For each on-chip...
US-5,780,912 Asymmetric low power MOS devices
Low threshold voltage MOS devices having asymmetric halo implants are disclosed herein. An asymmetric halo implant provides a pocket region located under a...
US-5,780,383 Solid superacid catalyst comprising group VII metal and having H.sub.o less than -18
The invention is a solid catalyst having acid strength H.sub.o less than -18. Such catalysts are characterized by the ability to react with very weak bases, such...
US-5,778,789 Offset lithographic printing process with a water based ink
An offset lithographic printing process comprising printing at a relative humidity of 75-90% utilizing a water-based, single fluid, fountain solution free,...
US-D396,031 Computer housing
US-5,778,427 Method and apparatus for selecting a way of a multi-way associative cache by storing waylets in a translation...
The present invention provides a cache manager (CM) for use with an address translation table (ATT) which take advantage of way information, available when a...
US-5,778,384 System and method for automounting and accessing remote file systems in Microsoft Windows in a networking...
A virtual file system accessing subsystem is disclosed for use in connection with a computer system connected in a computer network. The computer system runs a...
US-5,778,248 Fast microprocessor stage bypass logic enable
A method and apparatus for determining data dependencies and enabling bypass logic in parallel. In particular, a given stage in a given execution unit will (1)...
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