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Patent # Description
US-5,896,492 Maintaining data coherency between a primary memory controller and a backup memory controller
A fault tolerant memory control system is provided for a computer system having a host processor, a memory and a system interconnect. The memory control system...
US-5,896,458 Sticky leveler
A sticky leveler utilizing a window detection technique to preserve the relatively small level changes of an audio signal. The sticky leveler includes a voltage...
US-5,896,396 Method and apparatus for scan test of SRAM for microprocessors without full scan capability
An apparatus for allowing a RAM array within an SRAM to be tested via scan ATPG is disclosed. A first clocked flip-flop has a data input latched high, a scan-in...
US-5,896,307 Method for handling an underflow condition in a processor
A method for handling an underflow condition in a processor is disclosed. A first plurality of signal data is packed into a first memory location so as to form a...
US-5,896,140 Method and apparatus for simultaneously displaying graphics and video data on a computer display
A method and apparatus for displaying graphics data and video data, such as a video window, on a computer display. A graphics adapter chip stores graphics pixel...
US-5,895,499 Cross-domain data transfer using deferred page remapping
A cross-domain data transfer technique is disclosed in which page remapping operations are eliminated in situations where physical memory addresses can be passed...
US-D408,389 Icon for a computer screen
US-D408,306 Slip-on wrist case for hiking/outdoor instruments such as thermometers, compasses, clocks, signal mirrors,...
US-D408,178 Table top rim
US-5,894,587 Multiple bus bridge system for maintaining a complete order by delaying servicing interrupts while posting...
A system for maintaining completion order in a multiple bus system including a bridge that posts write data includes logic units for implementing a DRAIN/EMPTY...
US-5,894,568 Apparatus and method for computing a difference in a digital processing system
According to a presently preferred embodiment of the present invention, a method for processing a incoming signal comprising the steps of selecting from a first...
US-5,894,119 Device for enabling listeners to preview music recordings
A bar code reader, a wireless transceiver, an earphone jack and a battery are integrated into a pen sized device. The bar code reader is used to scan the product...
US-5,893,466 Support for printed circuit board during processing
During processing, such as wave soldering, it is necessary to support a printed circuit board (PCB) above a pallet or carrier without sagging. A support rod has...
US-5,893,165 System and method for parallel execution of memory transactions using multiple memory models, including SSO,...
A data processor supports the use of multiple memory models by computer programs. At a device external to a data processor, such as a memory controller, memory...
US-5,893,160 Deterministic distributed multi-cache coherence method and system
An efficient streamlined coherent protocol for a multi-processor multi-cache computing system. Each subsystem includes at least one processor and an associated...
US-5,893,153 Method and apparatus for preventing a race condition and maintaining cache coherency in a processor with...
An integrated processor includes an on-chip integrated input/output (IO) system (which does not have a on-chip bus) to handle direct memory access (DMA)...
US-5,893,152 Method and apparatus that detects and tolerates inconsistencies between the cache and main memory, and the...
Inconsistencies between cache and memory in a memory system operating in a computer are traced and corrected. A cache entry is checked against a counterpart...
US-5,893,150 Efficient allocation of cache memory space in a computer system
An efficient cache allocation scheme is provided for both uniprocessor and multiprocessor computer systems having at least one cache. In one embodiment, upon the...
US-5,893,149 Flushing of cache memory in a computer system
An efficient streamlined cache coherent protocol for replacing data is provided in a multiprocessor distributed-memory computer system. In one implementation,...
US-5,893,144 Hybrid NUMA COMA caching system and methods for selecting between the caching modes
The present invention provides a hybrid Non-Uniform Memory Architecture (NUMA) and Cache-Only Memory Architecture (COMA) caching architecture together with a...
US-5,893,121 System and method for swapping blocks of tagged stack entries between a tagged stack cache and an untagged main...
A computer system has a CPU, a stack cache and a main memory. The main memory is a conventional untagged memory, where each memory location is a word having a...
US-5,893,073 Method and apparatus for representing recurring events
A method and apparatus for representing and storing the schedules of recurring events. The schedules are represented by recurrence rules generated according to a...
US-5,892,970 Multiprocessing system configured to perform efficient block copy operations
A computer system optimized for block copy operations is provided. In order to perform a block copy from a remote source block to a local destination block, a...
US-5,892,966 Processor complex for executing multimedia functions
A computer processor complex including a hardware processor coupled to a multimedia coprocessor is provided. This computer processor complex is capable of...
US-5,892,957 Method and apparatus for interrupt communication in packet-switched microprocessor-based computer system
An apparatus and method for handling interrupt requests from any of a plurality of interrupters to any of a plurality of interrupt handlers. Each interrupt...
US-5,892,954 Method and apparatus for refreshing file locks to minimize conflicting accesses to data files
A system for generating and maintaining lock files to inhibit conflicting requests for data files. A first process that accesses a data file generates a lock...
US-5,892,951 Method and apparatus for efficient evaluation of semantic attributes in LALR parsing
A method and apparatus for compiling source code that pre-evaluates certain semantic attributes during syntactical analysis. The invention performs certain type...
US-5,892,950 Interface for telecommunications network management
An applications programming interface 20 to a telecommunications management network includes a command language interpreter 24 and a compiler 40. A command...
US-5,892,947 Test support tool system and method
A test support tool system and method produce software test programs from a logical description of selected software. Test programs are created by producing a...
US-5,892,919 Spell checking universal resource locator (URL) by comparing the URL against a cache containing entries...
A cache, storing misspelled or otherwise incorrect network addresses from a plurality of users and associated correct network addresses, is maintained at a proxy...
US-5,892,778 Boundary-scan circuit for use with linearized impedance control type output drivers
A circuit for coupling a LIC driver to a IEEE 1149.1 boundary scan implementation includes a logic circuit that converts the data and oe signals of the IEEE...
US-5,892,693 Signal interpolation and decimation exploiting filter symmetry
Symmetry in a filter is used to reduce the complexity of an interpolator or a decimator. A weight filter matrix which includes L=(N-1)M+K weights is divided into...
US-5,892,655 Hard disk drive heat sink
A plate formed with louvers and a depression to heat engage a hard disk drive motor is attached to such a drive. Heat from the motor is transferred to the plate....
US-5,892,510 Field objects and a method for developing a graphical user interface containing the field objects
A graphical user interface (GUI) application program has one or more screens and a number of objects hereinafter "field objects", each field object being...
US-5,892,141 Method and apparatus for analysis of particulate content of gases
A method and apparatus for analysis of particulate content of gases, applicable to the quantitative and qualitative analysis of vehicle engine emissions,...
US-5,891,832 Drilling fluid additive containing a fish oil/glycol mixture and related methods
A drilling fluid additive for use during drilling and excavating applications, the additive comprises a mixture of an oil, an ester alcohol, nonionic surfactant...
US-5,890,169 Disk fragmentation reduction using file allocation tables
A combined file allocation table file system (CFAT file system) uses two or more FAT file systems with different cluster sizes to form a single user visible FAT...
US-5,890,164 Estimating the degree of change of web pages
When monitoring a large number of information sources such as pages on the World Wide Web, a user may not have time to normally look at each source at regular...
US-5,890,008 Method for dynamically reconfiguring a processor
A method and apparatus for dynamically reconfiguring a processor involves placing the processor in a first configuration having a first number (m) of strands...
US-5,889,995 Using constant selectors for method identification
A process for generating method invocation instructions for a source-code program expressed in an object-oriented computer programming language is described. The...
US-5,889,990 Information appliance software architecture with replaceable service module providing abstraction function...
An architecture for an information appliance adapted for a specific application supports a variety of appliance personalities, relying on a single core...
US-5,889,940 System and method for reducing the effects of hardware faults in a computer system employing multiple central...
A fault-tolerant computer architecture is described wherein the effect of hardware faults is diminished. The architecture employs a main data bus having a...
US-5,889,435 On-chip PLL phase and jitter self-test circuit
An ASIC includes a PLL and digital circuitry to quantize and measure phase and average maximum jitter between a system clock input to the PLL, and a ...
US-5,889,417 Apparatus and method for improving the noise immunity of a dynamic logic signal repeater
A dynamic logic signal repeater includes a complementary dynamic logic circuit with an input node to receive an input signal and an output node storing a...
US-5,888,596 Ghost-like decorative object
Decorative structures comprising a flexible sheet-like member simulate universal conceptions of the appearance of floating and fixed ghosts. A structure for...
US-D407,389 Computer screen with a set of icons
US-5,887,181 Method and apparatus for reducing a computational result to the range boundaries of an unsigned 8-bit integer...
The method and apparatus for checking and reducing an intermediate result signal arising from a manipulation of data signals without using conditional branches,...
US-5,887,172 Remote procedure call system and method for RPC mechanism independent client and server interfaces...
A system and method allow client applications to invoke remote procedures on a server application using any of a plurality of remote procedure mechanisms, by...
US-5,887,138 Multiprocessing computer system employing local and global address spaces and COMA and NUMA access modes
A multiprocessing computer system employs local and global address spaces and Non- Uniform Memory Architecture (NUMA) and Cache-Only Memory Architecture (COMA)...
US-5,887,134 System and method for preserving message order while employing both programmed I/O and DMA operations
In a cluster of computer nodes, each node has network interface and at least one processor. Transmission of a multipart message from a first node to a second...
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