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Patent # Description
US-5,913,064 Method for generating instructions for an object-oriented processor
A method for generating code for an object-oriented processor is disclosed. An instruction table is initialized to include a plurality of instructions for an...
US-5,912,995 Method and apparatus for rotating or transposing a binary image
A method which may be implemented in a library routine for performing an image transformation. First, a plurality of groups of bits are selected, with each group...
US-5,912,906 Method and apparatus for recovering from correctable ECC errors
On-chip delivery of data from an on-chip or off-chip cache is separated into two buses. A fast fill bus provides data to latency critical caches without ECC...
US-5,912,799 Multiple disk drive storage enclosure with ventilation
An enclosure is assembled from metal-plated rigid structural foam plastic components to house in minimal space in many hard disk drives. Major components,...
US-5,912,677 Method for forming a sum in a signal processing system
According to a presently preferred embodiment of the present invention, a method for processing a incoming signal comprising the steps of selecting a first set...
US-5,912,673 Graphical image convolution using multiple pipelines
A parallel processor which is capable of partitioned multiplication and partitioned addition operations convolves multiple pixels in parallel. The parallel...
US-5,912,574 Dual loop PLL with secondary loop to achieve 50% duty cycle
A phased lock loop (PLL) clock circuit generates a clock signal at 1x the desired clock frequency while maintaining substantially a 50% duty cycle. A first loop...
US-5,912,567 Dual differential comparator with weak equalization and narrow metastability region
In a sample-and-hold circuit, an input is tracked at an output during a tracking period and the input is held during an holding period, the tracking period and...
US-5,912,563 Trinary signal apparatus and method
Extended trinary signal apparatus includes window comparator logic having first and second inputs for first and second trinary input signals, wherein each the...
US-5,911,778 Processing system security
For controlling access to a system resource in a processing system, reprogrammable logic located between a bus and the resource is programmed in a first mode to...
US-5,911,596 Strain relief apparatus and methods therefor
An apparatus for securing a conductor to a circuit board. The conductor is configured for being soldered to the circuit board through a first aperture in the...
US-D411,077 Handle for cooking utensil
US-D410,911 Icon for a computer screen
US-5,911,144 Method and apparatus for optimizing the assignment of hash values to nodes residing in a garbage collected heap
Apparatus, methods, systems, and computer program products are disclosed that generate a hash value for a node allocated from a generational garbage collected...
US-5,911,081 Method and apparatus for selectively inhibiting power shutdowns based upon the number of power shutdowns that...
Disclosed is a process and apparatus for controlling a power shutdown of an electrical device. The operations for controlling a power shutdown include ...
US-5,911,071 Persistent programming system and method for deploying self-containing executable applications
The invention creates a self-contained executable application. A compiler compiles an application including main source code and initialization code to generate...
US-5,911,052 Split transaction snooping bus protocol
A split transaction snooping bus protocol and architecture is provided for use in a system having one or many such buses. Circuit boards including CPU or other...
US-5,911,041 Method for generalized windows application install testing for use with an automated test tool
A computer implemented method and computer system for testing a target software product is presented. The method includes constructing a finite state machine in...
US-5,910,910 Circuit and method for rapid calculation of quotients and square roots
A circuit and method for accelerating the division algorithm and square root operations relating to integers or floating-point numbers. Minimization of the...
US-5,909,697 Reducing cache misses by snarfing writebacks in non-inclusive memory systems
A non-inclusive multi-level cache memory system is optimized by removing a first cache content from a first cache, so as to provide cache space in the first...
US-5,909,695 Maximal concurrent lookup cache for computing systems having a multi-threaded environment
A multi-threaded processing system has a cache that is commonly accessible to each thread. The cache has a plurality of entries for storing items, each entry...
US-5,909,686 Hardware-assisted central processing unit access to a forwarding database
A method and apparatus for providing hardware-assisted CPU access to a forwarding database is described. According to one aspect of the present invention, a...
US-5,909,579 Method and apparatus for encoding and decoding delta encoded information to locate live pointers in program...
Live pointer information for a stream of bytecodes is precomputed for each bytecode. The precomputed full live pointer information is stored only for bytecodes...
US-5,909,451 System and method for providing scan chain for digital electronic device having multiple clock domains
A digital electronic circuit device comprises a plurality of circuit elements, a scan chain establishment element, and a unitary clock domain establishment...
US-5,908,471 Diagnostic arrangement for digital computer system
A diagnostic subsystem is used in a digital device in a digital computer system includes a diagnostic register, a device output control circuit and a diagnostic...
US-5,907,847 Method and apparatus for coupling object state and behavior in a database management system
A method and apparatus for coupling object state and behavior in a DBMS is provided such that an object's class definition, behavior information, and state...
US-5,907,708 System and method for facilitating avoidance of an exception of a predetermined type in a digital computer...
A system for avoiding exceptional conditions during execution of a program comprises an execution environment for executing the program and a fix-up code...
US-5,907,705 Computer implemented request to integrate (RTI) system for managing change control in software release stream
Change control in a software release stream is managed by a computer implemented Request To Integrate (RTI) system, including at least one user unit having an...
US-5,907,695 Deadlock avoidance mechanism for virtual bus distributed hardware simulation
To simulate a bus of a circuit, a number of virtual bus stubs ("VBSs") each post simulated bus signals as a single step and execution of the simulation system...
US-5,907,680 Client-side, server-side and collaborative spell check of URL's
Spell checking of network addresses such as Uniform Resource Locator (URL) addresses is provided at three levels. Each is invoked when a connection to the...
US-5,907,675 Methods and apparatus for managing deactivation and shutdown of a server
A number of methods and apparatus for managing clients of a computer server. In particular, the usher implements an orderly and predictable server deactivation...
US-5,907,485 Method and apparatus for flow control in packet-switched computer system
This invention describes a link-by-link flow control method for packet-switched uniprocessor and multiprocessor computer systems that maximizes system resource...
US-5,907,293 System for displaying the characteristics, position, velocity and acceleration of nearby vehicles on a moving-map
Proximity radar mounted in a vehicle determines the location of other vehicles. Other vehicles detect their own positions and broadcast those positions to all...
US-5,906,657 System using position detector to determine location and orientation between computers to select information to...
A handheld computing device is used to copy files from the screen of a fixed computer. The display of the handheld device is linked to that of the underlying...
US-5,906,315 Watchdog timer for controlling a cooling system
A system and method for preventing a computer system from overheating when a processor or software controlling the processor which controls the cooling system...
US-5,905,998 Transaction activation processor for controlling memory transaction processing in a packet switched cache...
A multiprocessor computer system has a multiplicity of sub-systems and a main memory coupled to a system controller. Some of the sub-systems are data processors,...
US-5,905,892 Error correcting compiler
A software conversion tool that facilitates automated conversion of a software program from one operating environment to another. More particularly, a computer...
US-5,905,883 Verification system for circuit simulator
An electronic circuit verification system and method includes an HDL circuit simulator and a circuit simulation verifier that pass control back and forth between...
US-5,905,661 Method for handling an overflow condition in a processor
A method for handling an overflow condition in a processor is disclosed. A first plurality of signal data is packed into a first memory location so as to form a...
US-5,905,502 Compression of three-dimensional graphics data using a generalized triangle mesh format utilizing a mesh buffer
A system and method for efficiently specifying vertex information for a three-dimensional graphical object which includes a plurality of geometric primitives....
US-5,905,496 Workflow product navigation system
A workflow or product navigation system includes a single top-level screen which allows access to all aspects of the product information through selection of a...
US-5,905,399 CMOS integrated circuit regulator for reducing power supply noise
A CMOS integrated circuit regulator for mixed mode integrated circuits reduces digital switching noise through use of a clamped dual source follower circuit and...
US-5,904,878 Fluorescent orange azo pigments
Orange azo fluorescent pigments and a process for a preparing same. Orange azo fluorescent pigments as a component of printing ink, coating, plastic compositions...
US-5,904,732 Dynamic priority switching of load and store buffers in superscalar processor
A method and apparatus for dynamically switching the relative priorities of the load buffer and store buffer with respect to external memory resources in a...
US-D409,993 Icon for a computer screen
US-5,903,918 Program counter age bits
An apparatus and method of efficiently and dynamically generating the addresses associated with a set of instructions in a microprocessor pipeline is disclosed....
US-5,903,907 Skip-level write-through in a multi-level memory of a computer system
A flexible scheme is provided for designating the appropriate write-back protocol best suited for each memory level within a multi-level-cache computer system....
US-5,903,900 Method and apparatus for optimizing exact garbage collection of array nodes in a carded heap
Apparatus, methods, systems and computer program products are disclosed that optimize a programmed loop that stores pointer variables in an array in a...
US-5,903,899 System and method for assisting exact Garbage collection by segregating the contents of a stack into sub stacks
In a program data stack in a computer system, every stack is implemented as two substacks, one to contain references and one to contain primitive data. In this...
US-5,903,816 Interactive television system and method for displaying web-like stills with hyperlinks
A system and method for displaying still video images related to video content in an interactive broadcast television system. The system and method of the...
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