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Patent # Description
US-5,925,123 Processor for executing instruction sets received from a network or from a local memory
A dual instruction set processor decodes and executes code received from a network and code supplied from a local memory. Thus, the dual instruction set...
US-5,925,106 Method and apparatus for obtaining and displaying network server information
Apparatus, methods, and computer program products are disclosed to simplify a computer user's navigation through a distributed information space. The invention...
US-D412,069 Armless wicker chair
US-5,924,098 Method and apparatus for managing a linked-list data structure
A method of managing a linked-list data structure is disclosed. The linked-list data structure has a number of elements, each of which includes a data item and a...
US-5,923,987 Method for forming MOS devices with retrograde pocket regions and counter dopant regions at the substrate surface
Disclosed is a low threshold asymmetric MOS device having a pocket region with a graded concentration profile. The pocket region includes a relatively high...
US-5,923,885 Acquisition and operation of remotely loaded software using applet modification of browser software
Methods, systems, and software for installing and operating selected software applications on a client computer that is in communication with a server computer...
US-5,923,880 Method and apparatus for generating executable code from object-oriented source code
The present invention provides an improved method and apparatus for generating executable computer code for an application program written in C++ source code. In...
US-5,923,878 System, method and apparatus of directly executing an architecture-independent binary program
A system, method, and apparatus is disclosed for executing an architecture-independent binary program on a computer. An object file is read, and...
US-5,923,850 Historical asset information data storage schema
A system for managing asset information pertaining to a network. A network information database may both provide a snapshot of the current state of the network...
US-5,923,847 Split-SMP computer system configured to operate in a protected mode having repeater which inhibits transaction...
A computer system includes multiple local buses to which processors and other devices may be connected. A repeater is coupled to each of the local buses....
US-5,923,835 Method for scan test of SRAM for microprocessors having full scan capability
A method for allowing a RAM array within an SRAM to be tested via scan ATPG is disclosed. A first clocked flip-flop has a data input latched high, a scan-in...
US-5,922,050 Method and apparatus for controlling a device on a network
A system for controlling a device using a computer coupled to the device through a communication medium. The device contains an program code capable of...
US-5,922,049 Method for using DHCP and marking to override learned IP addesseses in a network
A preferred embodiment of the present invention includes a method and apparatus for routing an IP packets in a network of client systems. The router forwards IP...
US-5,920,889 Apparatus and method for write miss processing in a copy-back data cache with an allocating load buffer and a...
An apparatus for processing a write miss signal from a copy-back data cache includes a load-store unit with an allocating load buffer, a non-allocating store...
US-5,920,876 Performing exact garbage collection using bitmaps that identify pointer values within objects
One embodiment of the present invention presents a method and apparatus for efficiently performing garbage collection on objects defined within an ...
US-5,920,868 Cataloging apparatus for facilitating the re-use of distributed objects in a distributed object system
A method, apparatus, and computer program product for selecting and reviewing a distributed object installed on a distributed object system. A method of the...
US-5,920,722 System and process for efficiently determining absolute memory addresses for an intermediate code model
A system and process for efficiently determining absolute addresses for an intermediate code model of an address space are described. A processor interfaces to a...
US-5,920,566 Routing in a multi-layer distributed network element
A multi-layer distributed network element for relaying packets according to known routing protocols. A distributed architecture of multiple subsystems delivers...
US-5,920,218 Single-phase edge-triggered dual-rail dynamic flip-flop
A single phase edge-triggered dual-rail dynamic flip-flop circuit for use with dynamic logic gates includes an input stage, precharge stage and buffer. The input...
US-5,920,215 Time-to-charge converter circuit
In a charge pump the noise due to switching transients on the input pulse lines is kept to extremely low levels by translating input up/down pulses into small...
US-5,919,265 Source synchronization data transfers without resynchronization penalty
A system clock generator for a computer system to efficiently transfer data from a source subsystem to a destination subsystem of the computer system. The system...
US-D411,774 Disposable package and dispenser
US-5,918,245 Microprocessor having a cache memory system using multi-level cache set prediction
A cache structure for a microprocessor which provides set-prediction information for a separate, second-level cache, and a method for improving cache accessing,...
US-5,918,034 Method for decoupling pipeline stages
The present invention solves the problems associated with the prior art by decoupling the issuing of instructions from their dispatch into their respective...
US-5,917,740 Apparatus for reducing a computational result to the range boundaries of a signed 16-bit integer in case of...
The present invention is directed to checking and reducing an intermediate signal arising from a manipulation of 16-bit signed data signals without using...
US-5,917,355 Edge-triggered staticized dynamic flip-flop with conditional shut-off mechanism
A single phase edge-triggered staticized dynamic flip-flop circuit for use with dynamic logic gates includes a dynamic input stage and a static output stage. The...
US-5,916,259 Coaxial waveguide applicator for an electromagnetic wave-activated sorption system
The present invention is directed to a coaxial waveguide applicator for an electromagnetic wave-activated sorption system which comprises at least one sorber...
US-D411,663 Gripper portfolio
US-D411,527 Icon for a computer screen
US-D411,526 Icon for a computer screen
US-5,915,255 Method and apparatus for referencing nodes using links
Apparatus, methods, systems, and computer program products are disclosed that use a link to access nodes in a generational garbage collected heap. The creation...
US-5,915,096 Network browsing system and method
A network browser system facilitates browsing of resources in a network, each of the resources having a respective network address. The network browser system...
US-5,914,724 Lighting unit for a three-dimensional graphics accelerator with improved handling of incoming color values
A lighting unit which exhibits improved handling of incoming color values corresponding to a polygon. The lighting unit includes an input buffer for storing a...
US-5,914,723 Method and system for converting images in computer systems
The present invention provides a method and system in computer systems for converting an original image into another image having fewer colors than the original...
US-5,914,675 Emergency locator device transmitting location data by wireless telephone communications
A portable emergency locator device includes a global positioning system (GPS) receiver generating location data and a wireless telephone transceiver for...
US-5,913,218 System and method for retrieving and updating configuration parameter values for application programs in a...
A configuration parameter value access system used in connection with a computer system performs an access operation in connection with a configuration parameter...
US-5,913,065 System, method and article of manufacture for creating hierarchical folder components for use in a java...
Method, system and article of manufacture for creating hierarchical folder components for use with in holding other object oriented based components, including...
US-5,913,064 Method for generating instructions for an object-oriented processor
A method for generating code for an object-oriented processor is disclosed. An instruction table is initialized to include a plurality of instructions for an...
US-5,912,995 Method and apparatus for rotating or transposing a binary image
A method which may be implemented in a library routine for performing an image transformation. First, a plurality of groups of bits are selected, with each group...
US-5,912,906 Method and apparatus for recovering from correctable ECC errors
On-chip delivery of data from an on-chip or off-chip cache is separated into two buses. A fast fill bus provides data to latency critical caches without ECC...
US-5,912,799 Multiple disk drive storage enclosure with ventilation
An enclosure is assembled from metal-plated rigid structural foam plastic components to house in minimal space in many hard disk drives. Major components,...
US-5,912,677 Method for forming a sum in a signal processing system
According to a presently preferred embodiment of the present invention, a method for processing a incoming signal comprising the steps of selecting a first set...
US-5,912,673 Graphical image convolution using multiple pipelines
A parallel processor which is capable of partitioned multiplication and partitioned addition operations convolves multiple pixels in parallel. The parallel...
US-5,912,574 Dual loop PLL with secondary loop to achieve 50% duty cycle
A phased lock loop (PLL) clock circuit generates a clock signal at 1x the desired clock frequency while maintaining substantially a 50% duty cycle. A first loop...
US-5,912,567 Dual differential comparator with weak equalization and narrow metastability region
In a sample-and-hold circuit, an input is tracked at an output during a tracking period and the input is held during an holding period, the tracking period and...
US-5,912,563 Trinary signal apparatus and method
Extended trinary signal apparatus includes window comparator logic having first and second inputs for first and second trinary input signals, wherein each the...
US-5,911,778 Processing system security
For controlling access to a system resource in a processing system, reprogrammable logic located between a bus and the resource is programmed in a first mode to...
US-5,911,596 Strain relief apparatus and methods therefor
An apparatus for securing a conductor to a circuit board. The conductor is configured for being soldered to the circuit board through a first aperture in the...
US-D411,077 Handle for cooking utensil
US-D410,911 Icon for a computer screen
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