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Patent # Description
US-5,987,549 Method and apparatus providing short latency round-robin arbitration for access to a shared resource
Low-latency distributed round-robin arbitration is used to grant requests for access to a shared resource such as a computer system bus. A plurality of circuit...
US-5,987,514 System and method for advanced event request management for networks
A network manager automatically sends certain requests in response to selected events generated by network devices. When a device generates an event, the network...
US-5,987,512 Method and apparatus for access to remote gateway servers
The invention is a method and apparatus for dynamically loading a gateway server into a client machine if one is needed for the client machine to communicate...
US-5,987,492 Method and apparatus for processor sharing
A method and apparatus for implementing proportional sharing in a single processor system and/or in a multi-processor system. The invention can also implement...
US-5,987,429 Computer-based fee processing for electronic commerce
Fees due from transactions in electronic commerce are processed by building a transaction information database with transaction event objects based on events in...
US-5,987,259 Functional unit switching for the allocation of registers
A method and apparatus for allocating registers when compiling code is provided. In response to determining there are insufficient registers associated with a...
US-5,987,245 Object-oriented system, method and article of manufacture (#12) for a client-server state machine framework
An interprise computing manager in which an application is composed of a client (front end) program which communicates utilizing a network with a server (back...
US-5,987,123 Secure file system
A method and apparatus that allows a computer system to trust both program and data files without the intervention of the user and without the possibility of...
US-5,987,081 Method and apparatus for a testable high frequency synchronizer
A synchronizer comprised in part of a series of flip-flops is used to deterministically transfer data between clock domains during system test. Flip-flops in the...
US-5,986,643 Tactile feedback mechanism for a data processing system
An apparatus for providing a tactile stimulus to a part of the body of a physical operator when a virtual operator, created by movements of the physical...
US-5,986,475 Apparatus and method for resetting a dynamic logic circuit
An apparatus and method for resetting a dynamic logic circuit is disclosed. The apparatus includes an input circuit coupled to a plurality of input nodes wherein...
US-5,985,984 Formaldehyde free guanamine resin for lithographic energy curable inks
A composition comprising a condensation resin of the formula: wherein each A has the structure: ##STR1## and Y is a phenyl group or a methyl group; X is an...
US-5,985,727 Method for forming MOS devices with retrograde pocket regions and counter dopant regions buried in the...
Disclosed is a low threshold asymmetric MOS device having a pocket region with a graded concentration profile. The pocket region includes a relatively high...
US-5,985,697 Method and apparatus for mounting an integrated circuit to a printed circuit board
An apparatus for mounting an integrated circuit chip to a main printed circuit board is disclosed. The mounting apparatus is particularly suitable for situations...
US-5,983,376 Automated scan insertion flow for control block design
In a control block design methodology, control block design proceeds without the inclusion of scan functionality until the functional design specifications are...
US-5,983,332 Asynchronous transfer mode (ATM) segmentation and reassembly unit virtual address translation unit architecture
An apparatus and method for translating a virtual address to a physical address utilizing an address translation unit implemented within a network interface card...
US-5,983,329 Caching virtual memory locks
A virtual memory lock is placed upon a region of physical memory within a computer system in response to an I/O request through the use of a range lock. Each...
US-5,983,326 Multiprocessing system including an enhanced blocking mechanism for read-to-share-transactions in a NUMA mode
A multiprocessing system having a plurality of processing nodes interconnected by an interconnect network. A home agent is configured to service multiple...
US-5,983,283 Storage manager independent configuration interface translator and method
A system, method and computer program product comprising a storage manager independent configuration interface translator which requests an opaque listing of the...
US-5,983,276 Acknowledgement tracking and automatic faxing system of EDI transactions on the internet
A method and apparatus for performing reliable data transfer operations over a global computer network are provided. This is accomplished by transmitting data...
US-5,983,021 Dynamically switching statically bound function calls to dynamically bound function calls without recompilation
An improved hybrid dynamic-binding system for switching between static binding and dynamic binding of function calls provides static binding for function calls...
US-5,983,013 Method for generating non-blocking delayed clocking signals for domino logic
A method for generating non-blocking multiple-phase clocking system for use with domino-type dynamic logic includes receiving a primary clock signal and...
US-5,983,001 Method and system for facilitating the automatic creation of test scripts
The present invention provides a method and system for creating a test script. The invention begins processing when a user requests the automatic creation of a...
US-5,982,834 Clock recovery system for high speed small amplitude data stream
A clock recovery system that allows recovery of a clock signal from a high speed, potentially small amplitude data stream. The invention uses a normally avoided...
US-5,982,772 Cell interface block partitioning for segmentation and re-assembly engine
A method and apparatus for interfacing between a Segmentation and Reassembly (SAR) circuit and an ATM Cell Interface is disclosed. The interface circuit...
US-5,982,375 Floating point processor for a three-dimensional graphics accelerator which includes single-pass stereo capability
A computer system which exhibits increased performance for stereo viewing. The computer system includes a display screen, a bus for transferring data, a memory...
US-5,982,371 Method and apparatus for executing and displaying output of an environment in a host environment
An environment is emulated in a host environment. Output generated in the emulated environment is displayed in a window of the host environment. The emulated...
US-5,982,210 PLL system clock generator with instantaneous clock frequency shifting
The present invention provides a phase locked loop (PLL) clock generator for a digital system. The PLL clock generator is capable of an instantaneous transition...
US-5,982,191 Broadly distributed termination for buses using switched terminator logic
A bus line is provided with broadly distributed signal termination by using switched termination logic where the pull up resistance of a driver corresponds to...
US-5,979,955 Vertical extraction tool for semiconductor packaged devices
An extraction tool for extracting a module that is detachably connected to a mounting substrate includes a fixed plate that is vertically supported over the...
US-5,979,111 Plant growing system
A plurality of plant flats are supported on a movable plant flat support rack positioned adjacent an irrigation trough for movement between an upper position and...
US-D416,127 Golf cleat
US-5,978,874 Implementing snooping on a split-transaction computer system bus
Snooping is implemented on a split transaction snooping bus for a computer system having one or many such buses. Circuit boards including CPU or other devices...
US-5,978,864 Method for thermal overload detection and prevention for an intergrated circuit processor
A system and method for thermal overload detection and protection for a processor which allows the processor to run at near maximum potential for the vast...
US-5,978,845 Network management relay mechanism
A relay mechanism for a network management system permits ready extension and/or modification to an existing system through the use of standard network protocol...
US-5,978,727 Method and apparatus for engine analysis by waveform comparison
A method and apparatus for analysis of engines analyzes digitized input signals from, for example, engine injectors and compares this digital data with the...
US-5,978,588 Method and apparatus for profile-based code placement using a minimum cut set of the control flow graph
A method and apparatus placing blocks of object code by a compiler. The code placement is done optimally, using a "cut set technique" that uses the...
US-5,978,575 Remote terminal emulator with improved time accounting
A remote terminal emulator (RTE) is provided in which substantially all of the time elapsing during an emulated use of a computer system under test is...
US-5,978,419 Transmitter and receiver circuits for high-speed parallel digital data transmission link
An information transfer system includes a transmitter and a receiver for transferring information over a differential communication link. The transmitter circuit...
US-5,977,991 Frame buffer system with non-overlapping pixel buffer access variable interleaving, nibble replication
A frame buffer system is disclosed that employs non overlapping serial enable signals to access pixel data values from sets of pixel buffers contained in each...
US-5,977,961 Method and apparatus for amplitude band enabled addressing arrayed elements
Arrayed display pixels are coupled such that all row pixels are coupled together by a row conductive element and all column pixels are coupled together by a...
US-5,975,007 Combined whistle and environmental instruments
A whistle designed particularly for outdoor use, such as in hiking or camping, wherein opposite sidewalls of the whistle are provided with openings having...
US-5,974,576 On-line memory monitoring system and methods
On-line memory monitoring system and methods wherein memory subsystem performance is tracked to detect substandard performance and alert a system administrator...
US-5,974,511 Cache subsystem with pseudo-packet switch
A host includes a bus cache, a L1 cache and an enhanced snoop logic circuit to increase bandwidth of peripheral bus during a memory access transaction. When a...
US-5,974,509 Method for purging unused data from a cache memory
An efficient method for purging cache memory sub-blocks within a cache memory block is disclosed. The method is particularly applicable to cache memories...
US-5,974,489 Computer bus expansion
An arrangement is provided whereby an expansion card can be inserted in a multi-contact computer backplane connector and then gates provided between bus lines...
US-5,974,417 Database network connectivity product
A method and apparatus for publishing and receiving events to a network. A plurality of "publisher" entities publish information and a plurality of "subscriber"...
US-5,974,103 Deterministic exchange of data between synchronised systems separated by a distance
A method and apparatus provides data transmission between synchronous systems. One system has a phase locked loop to provide its local clock. The other system...
US-5,973,951 Single in-line memory module
A single in-line memory module (SIMM) for memory expansion in a computer system. The SIMM includes a plurality of memory chips surface-mounted on a printed...
US-5,973,687 Graphical distributed make tool methods apparatus and computer program products
A make system includes an overlay make tool for graphical presentation of user-friendly data regarding build operations updating multi-file software ...
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