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Patent # Description
US-6,076,042 Altitude sparse aircraft display
A system, method, apparatus, and computer program product for avoiding aircraft collisions with stationary obstacles. The aircraft is provided with a simplified...
US-6,075,942 Encoding machine-specific optimization in generic byte code by using local variables as pseudo-registers
A first computer system (34) compiles a source program into machine code for a register-oriented microprocessor, optimizing the global allocation of...
US-6,075,940 System and method for pre-verification of stack usage in bytecode program loops
The present invention provides a verifier for use in conjunction with programs utilizing data type specific bytecodes for verifying the proper operation of the...
US-6,075,931 Method for efficient implementation of multi-ported logic FIFO structures in a processor
A system and method for efficient implementation of a multi-port logic first-in, first-out ("FIFO") structure or particular utility in high clock speed...
US-6,074,681 Method of drying konjak in producing dried seasoned konjak
A method of drying konjak slices in producing seasoned dried konjak slices is provided which method allows for reducing the drying time while at the same time...
US-6,074,427 Apparatus and method for simulating multiple nodes on a single machine
The present invention pertains to a system and method for simulating multiple clusters of independent computer nodes in a single machine. A cluster contains one...
US-6,073,224 Network interface circuit with replacement circuitry and method for segregating memory in an address...
A circuit and method for segregating address entries of memory, internal to an address translation unit, into locked and unlocked regions. The locked region is a...
US-6,073,212 Reducing bandwidth and areas needed for non-inclusive memory hierarchy by using dual tags
An apparatus and method for optimizing a non-inclusive hierarchical cache memory system that includes a first and second cache for storing information. The first and...
US-6,073,178 Method and apparatus for assignment of IP addresses
A preferred embodiment of the present invention includes a method and apparatus for allocating and using IP addresses in a network of client systems. More...
US-6,073,150 Apparatus for directing a parallel processing computing device to form an absolute value of a signed value
In the present invention, a method for directing parallel processing computing device to perform the operation of setting a signed value of N bits to an absolute...
US-6,073,144 Document editor for linear and space efficient representation of hierarchical documents
A computer system and method edits a hierarchical document that has starttags and endtags and leaf contents between ones of the starttags and endtags. The...
US-6,073,113 Compatibility checking between instruments, operations and protocols in electronic commerce
The present invention provides a modular infrastructure for electronic commerce that allows electronic financial instruments to work with a variety of different...
US-6,072,945 System for automated electromigration verification
An automated apparatus detects electromigration violations in an integrated circuit design. Starting from the lowest hierarchy of the design so far completed,...
US-6,072,805 Observing arbiter
An arbiter is disclosed for determining a sequence of signals indicative of events occurring variously on at least two input connections. The arbiter includes a...
US-6,072,217 Tunable threshold SOI device using isolated well structure for back gate
To reduce threshold levels in fully depleted SOI devices having back gate wells, the channel regions of the devices are formed of an intrinsic or ...
US-6,071,983 Primer composition and curable composition
A curable dental adhesive composition of the type including polymerizable monomer and polymerization initiator may be easily prepared and applied to a tooth...
US-6,071,160 Surfboard having embedded reinforcing mesh
A surfboard includes a board and a plate secured to the bottom of the board and formed by a foamable material. A reinforcing mesh is embedded in the plate and...
US-D426,210 Icon for a computer screen
US-D426,198 Computer cabinet
US-6,070,251 Method and apparatus for high availability and caching data storage devices
A method and apparatus for high availability and caching data storage devices. According to a preferred embodiment of the invention, there is provided an...
US-6,070,242 Method to activate unregistered systems in a distributed multiserver network environment
The present invention includes a method and apparatus for registering devices in a computer network. Initially, for an unregistered device, the network...
US-6,070,239 System and method for executing verifiable programs with facility for using non-verifiable programs from...
A computer system includes a program executer that executes verifiable architecture neutral programs and a class loader that prohibits the loading and execution...
US-6,069,625 Method and system for efficient organization of selectable elements on a graphical user interface
In a preferred embodiment, the present invention provides a method and system for organizing selectable elements on a graphical user interface (GUI). Initially,...
US-6,069,521 Voltage regulation method for attenuating inductance-induced on-chip supply variations
An active digital voltage regulator circuit stores energy during times when the local power supply voltage is greater than a predefined voltage, e.g., during...
US-6,069,515 High voltage input buffer circuit using low voltage transistors
An input buffer circuit implemented with low voltage transistors, that is capable of receiving and recognizing input logic signals having higher voltage levels...
US-6,069,514 Using asynchronous FIFO control rings for synchronous systems
A system for distributing clock signals to multiple locations on a chip with minimal skew is disclosed. A series of FIFO control structures, connected in a ring...
US-D425,879 Computer bezel
US-6,067,602 Multi-stack-caching memory architecture
The present invention provides a memory system that caches method frames using multiple stack cache management units to provide access to multiple portions of...
US-6,067,575 System and method for generating trusted, architecture specific, compiled versions of architecture neutral programs
A distributed computer system has a program compiling computer and a program executing computer. The program compiling computer is operated by a compiling party...
US-6,067,225 Disk drive bracket
A bracket having two parallel sides and an interconnecting crosspiece is attached to a disk drive or similar peripheral with the sides of the bracket extending...
US-6,067,099 High-performance band combine function
A high-performance band combine function to transform a source image of n bands to a destination image of m bands. A source image vector is multiplied with a...
US-D425,498 Image for a computer display
US-6,065,109 Arbitration logic using a four-phase signaling protocol for control of a counterflow pipeline processor
A counterflow pipeline is provided which includes an instruction pipeline having a plurality of stages for transmitting instruction packets in a first direction...
US-6,065,108 Non-quick instruction accelerator including instruction identifier and data set storage and method of...
An instruction accelerator which includes a processor and an associative memory. The processor is coupled to receive a stream of instructions and a corresponding...
US-6,065,097 Apparatus and method for sharing a unified memory bus between external cache memory and primary memory
A computer system includes a central processing unit with an internal memory controller. The internal memory controller interacts with an external cache and a...
US-6,065,052 System for maintaining strongly sequentially ordered packet flow in a ring network system with busy and failed...
A system for maintaining reliable packet distribution in a ring network with support for strongly ordered, nonidempotent commands. Each consumer node on the...
US-6,065,050 System and method for indexing between trick play and normal play video streams in a video delivery system
A system and method for indexing between video streams in an interactive video delivery system. The interactive video delivery system includes at least one media...
US-6,064,815 System and method for generating fix-up code facilitating avoidance of an exception of a predetermined type in...
A system for avoiding exceptional conditions during execution of a program comprises an execution enviornment for executing the program and a fix-up code...
US-6,064,672 System for dynamic ordering support in a ringlet serial interconnect
A system for maintaining reliable packet distribution in a ring network with support for strongly ordered, nonidempotent commands. Each consumer node on the...
US-6,064,656 Distributed system and method for controlling access control to network resources
An access control database defines access rights through the use of access control objects. The access control objects include group objects, each defining a...
US-6,064,408 Method, apparatus and computer program product for eliminating edge conditions from an area image processing...
Apparatus, methods, and computer program products are disclosed for reducing the overhead associated with performing area-image operations on a tiled image. The...
US-6,064,379 System and method for synchronizing presentation of media stream playlists with real time
A multimedia server system includes a disk array subsystem including a plurality of multimedia files, e.g., movies, a media file system manager for managing the...
US-6,064,230 Process compensated output driver with slew rate control
A circuit which can compensate for process variations in controlling a drive transistor, whether for driving internal circuits or an output driver. A drive...
US-6,061,953 Potted plant protector device
A potted plant protector device comprising a base, arms and fingers extending therefrom in a generally dome-shaped pattern is provided. The circumference of the...
US-6,061,772 Split write data processing mechanism for memory controllers utilizing inactive periods during write data...
A memory controller provides fast processing of sequential split memory access instructions which include a split write instruction. In a split write...
US-6,061,766 Non-inclusive cache method using pipelined snoop bus
A non-inclusive cache system includes an external cache and a plurality of on-chip caches each having a set of tags associated therewith, with at least one of...
US-6,061,721 Bean-based management system
A network management system is generated by composing a network management model using a bean-based environment and then compiling the model to implement the...
US-6,061,693 System and method for retrieving and updating configuration parameter values for application programs in a...
A configuration parameter value access system used in connection with a computer system performs an access operation in connection with a configuration parameter...
US-6,061,520 Method and system for performing static initialization
The disclosed system represents an improvement over conventional systems for initializing static arrays by reducing the amount of code executed by the virtual...
US-6,061,519 Embedding multiple (non embedded) high level languages into an assembler code
A novel method is taught to quickly and easily produce assember code from a single embedded file which can include high level language code written in any of a...
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