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Patent # Description
US-6,233,621 System and method for space efficient hashcode allocation
In summary, the present invention is a multithreaded computer system having a memory that stores a plurality of objects and a plurality of procedures. The system...
US-6,233,620 Object-oriented system, method and article of manufacture for a presentation engine in an interprise computing...
An interprise computing manager in which an application is composed of a client (front end) program which communicates utilizing a network with a server (back...
US-6,233,615 System for maintaining strongly sequentially ordered packet flow in a ring network system with busy and failed...
A system for maintaining reliable packet distribution in a ring network with support for strongly ordered, nonidempotent commands. Each consumer node on the...
US-6,233,582 Persistent storage interface for a configuration object-based system
Methods and apparatus for implementing a persistent storage interface that may be used to store entries into a variety of different storage subsystems are...
US-6,232,792 Terminating transmission lines using on-chip terminator circuitry
An information handling system is disclosed herein. The system includes at least one system transmission line having a characteristic impedance and a plurality...
US-6,232,361 Radiation curable water based cationic inks and coatings
An actinic radiation curable, cationic polymerizable, ink and coating composition having greatly enhanced reactivity, and reduced viscosity and are low in odor...
US-6,230,296 Method and apparatus for providing error correction
The invention is directed to an error correction scheme used in a computer system where data is provided from a service to a terminal. The data is dynamically...
US-6,230,266 Authentication system and process
An authentication method and process are provided. One aspect of the process of the present invention includes authorizing a first on-line revocation server...
US-6,230,230 Elimination of traps and atomics in thread synchronization
Elimination of traps and atomics in thread synchronization is provided. In one embodiment, a processor includes a lock cache. The lock cache holds a value that...
US-6,230,184 Method and apparatus for automatically optimizing execution of a computer program
The claimed invention can be used to automatically determine what files are needed to optimally execute a computer program to a desired state. In one embodiment...
US-6,229,521 Method for antialiasing fonts for television display
A method for generating a font for display on an interlaced monitor which is relatively free of the distorting effects of interlacing. The method operates by...
US-6,229,319 Chip carrier to allow electron beam probing and fib modifications
Disclosed are a die carrier and associated method for conducting probe beam tests on chips designed to be packaged in flip-chip packages. The die carrier is a...
US-6,226,752 Method and apparatus for authenticating users
A method and apparatus for authenticating users. Prior art mechanisms require each individual application (running on an "application server") that the user is...
US-6,226,746 Stack-based system and method to combine security requirements of methods
A system obtains the security requirements for an action requested by a thread executing on a computer. The thread invokes a plurality of methods during its...
US-6,226,713 Apparatus and method for queueing structures in a multi-level non-blocking cache subsystem
A multi-level cache and method for operation thereof is presented for processing multiple cache system accesses simultaneously and handling the interactions...
US-6,226,698 Method and apparatus for dynamically calculating degrees of fullness of a synchronous FIFO
An interface circuit, coupled between a first circuitry that is synchronous to a first clock (sclk) and a second circuitry that is synchronous to a second clock...
US-6,226,679 Common management information protocol (CMIP) agent registration methods systems and computer program products
A computer network includes a local management information server (MIS) and a common management information protocol (CMIP) management protocol adapter (MPA) for...
US-6,226,671 Shared memory system for symmetric multiprocessor systems
A shared memory system for symmetric multiprocessing systems including a plurality of physical memory locations in which the locations are either allocated to...
US-6,226,662 Signal interpolation and decimation exploiting filter symmetry
Symmetry in a filter is used to reduce the complexity of an interpolator or a decimator and to simplify derivation of resulting discrete samples. In particular,...
US-6,226,654 Web document based graphical user interface
A Web document based GUI for use on a client computer that is networked with server computers. The GUI enables a user of the client computer to initiate specific...
US-6,226,406 Method and apparatus for hybrid sampling image verification
A method and apparatus are disclosed for testing the accuracy of images generated by a computer graphics program. An output image created by a graphics program...
US-6,226,184 Enclosure mounted heat sink
A heat sink for a heat generating component of a computer system, such as a central processing unit (CPU), attaches to the computer system enclosure. The heat...
US-6,226,007 Method and apparatus for modeling specular reflection
A method and apparatus for modeling the specular reflection of light from an object is disclosed. In accordance with one embodiment of the method, a portion of...
US-6,225,993 Video on demand applet method and apparatus for inclusion of motion video in multimedia documents
A computer process which requests streams of motion video titles and decodes and displays the motion video signals of the stream for display in a computer...
US-D441,389 Spectacles
US-6,223,346 Computer program product having preloaded software module
A method and system for providing an executable module having an address space for storing program data that is to reside in a read-only storage medium and an...
US-6,223,340 Method for directly inlining virtual calls without on-stack replacement
A dynamic compiler determines whether to inline methods in place of virtual method calls by inspecting such calls' receiver expressions. If a given call site...
US-6,223,335 Platform independent double compare and swap operation
A system for providing a double compare and swap operation is disclosed. In the disclosed system, a first single compare and swap operation is performed. If a...
US-6,223,289 Method and apparatus for session management and user authentication
Authentication and session management can be used with a system architecture that partitions functionality between a human interface device (HID) and a...
US-6,223,231 Method and apparatus for highly-available processing of I/O requests while application processing continues
One embodiment of the present invention provides a system that allows an I/O request to proceed when a primary server that is processing the I/O request fails,...
US-6,223,230 Direct memory access in a bridge for a multi-processor system
A bridge for a multi-processor system includes bus interfaces for connection to an I/O bus of a first processing set, an I/O bus of a second processing set, and...
US-6,223,204 User level adaptive thread blocking
A computer apparatus with user and kernel level memory regions schedules multiple light weight processes to run on one or more data processors. A mutex protects...
US-6,223,188 Presentation of link information as an aid to hypermedia navigation
A system for presenting hypermedia link information. A computer-implemented method for presenting hypermedia link information is described which relates to the...
US-6,222,777 Output circuit for alternating multiple bit line per column memory architecture
A memory has memory cells arranged in rows and columns. The memory cells of each row are coupled to a word line that is separate from word lines connecting to...
US-6,222,523 Tactile feedback mechanism for a data processing system
An apparatus for providing a tactile stimulus to a part of the body of a physical operator when a virtual operator, created by movements of the physical...
US-6,222,404 Edge-triggered dual-rail dynamic flip-flop with an enhanced self-shut-off mechanism
A shut-off circuit included in a dynamic flip-flop isolates output terminals of the dynamic flip-flop from circuitry within the flip-flop that could introduce...
US-6,222,122 Sealed liquid-filled module and method of forming same
Cooling liquids such as fluorocarbons are enclosed within a module containing electronic components on a printed wiring board. Preferably top and bottom covers...
US-6,220,768 Network asset survey tool for gathering data about node equipment
An efficient asset survey tool is disclosed. For networks having 3,000 nodes, equipment and configuration information may be collected in a few hours, even with...
US-6,220,460 Bathroom rack
A bathroom rack comprises a base, a holding rod, and a cover. The base is provided with a plurality of first retaining portions and through holes. The base is...
US-6,219,905 Heat sink clip tool
A clip assembly tool for grasping the finger and legs of a retainer and spreading them apart from one another includes a lower arm having a first clasp and an...
US-D441,035 Surface for a user plate of a scooter
US-6,219,812 Apparatus and method for interfacing boundary-scan circuitry with DTL output drivers
A system for coupling a Dynamic Termination Logic (DTL) type output driver to IEEE 1149.1 boundary-scan circuitry includes a logic circuit that converts the data...
US-6,219,778 Apparatus for generating out-of-order results and out-of-order condition codes in a processor
A processor including at least one execution unit generating out-of-order results and out-of-order condition codes. Precise architectural state of the processor...
US-6,219,757 Cache flush operation for a stack-based microprocessor
A method for flushing the data cache in a microprocessor. A central processing unit in the microprocessor is used to perform an operation on a first address...
US-6,219,723 Method and apparatus for moderating current demand in an integrated circuit processor
A system and method for thermal overload detection and protection for a processor which allows the processor to run at near maximum potential for the vast...
US-6,219,700 Method and apparatus for managing services in a computer network from a central console
A method and apparatus for managing computer network services from a central management console program residing on an administration server is disclosed. A...
US-6,219,678 System and method for maintaining an association for an object
A system optimizes representation of associations in an object-oriented programming environment. The system includes a memory and a memory manager. The memory...
US-6,218,855 Datapath global routing using flexible pins for side exiting buses
A method for routing a conductive path in an integrated circuit is described. The method includes providing a side exiting bus comprising at least one pin, and...
US-6,218,708 Back-biased MOS device and method
An MOS device has source and drain regions of a first conductivity formed in a well of a second conductivity, the well of the second conductivity being formed in...
US-D440,577 Display panel with a computer icon
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