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Security system and method for financial institution server and client
The financial transaction processing system includes at least one financial server connected through a public network to a number of users associated with client...
Repair TTL computation and correction mechanism to perform localized
repairs in a multicast data distribution...
Determination of a Time To Live ("TTL") hop count for repair data units transmitted from a repair head to a standard destination device in a communications...
Method and system for generating improved progress indicators
A method and system for generating improved command progress indicator including the steps of establishing at a location of a display at least one...
System and method for edge termination of parallel conductive planes in
an electrical interconnecting apparatus
A system and method are presented for stabilizing the electrical impedance of an electrical interconnecting apparatus including a pair of parallel planar...
Signal detector with improved noise immunity
A method for processing a signal transitioning from a high state to a low state is described, comprising the steps of detecting a transition of the signal from a...
Apparatus and method for assisting exact garbage collection by using a
stack cache of tag bits
In computer systems which do not inherently distinguish between references and primitive values within a program stack a method and apparatus to assist exact...
System for multisized bus coupling in a packet-switched computer system
A data transfer control system for a computer system having a packet-switched data bus, for controlling the transfer of data words from a device having one bus...
Method and structure for interrupt polling signal bandwidth allocation
in universal serial bus (USB) system
A Universal Serial Bus (USB) controller includes an allocation unit configured to allocate bandwidths to a plurality of nodes in a polling list, each node being...
Method and apparatus for distributed indexing and retrieval
Systems and methods consistent with the present invention access information from databases having stored indexes of completed information corresponding to the...
Power supply attachments for tower computer enclosure
A tower-type computer power supply is supported from the top of the chassis by tracks so that it may be slid horizontally outward of the back of the chassis. A...
Printed circuit board with integrated cooling mechanism
An electronic device having two or more printed circuit boards with integrated heat-dissipating mechanism without a fan. A heat-generating circuit component is...
Phase enable and clock generation circuit
A phase-enable circuit clocks a first functional unit at a first frequency and a second functional unit at a second frequency. Each of the first and second...
Tunable threshold SOI device using back gate and intrinsic channel region
In a fully depleted SOI device having a back gate structure, the channel region of the device is formed of an intrinsic or pseudo-intrinsic semiconductor. This...
Coating that enables soldering to non-solderable surfaces
A composite coating provides a solderable surface on materials that cannot otherwise be soldered. The solderable coating is comprised of a composite layer of two...
Apparatus and methods for execution of computer instructions
A computer instruction execution unit includes different execution paths for different categories of instructions. Different execution paths share circuitry. The...
Snap-fit door hinge assembly and method
A snap-on hinge assembly (20) for pivotally mounting a door (14) to a base (12) including a pivot saddle or pin (22) and a snap-acting gripping assembly (24)...
Fetching and handling a bundle of instructions comprising instructions
and non-complex instructions
In a processor that executes complex instructions which are expanded into microinstructions prior to execution, non-complex instruction execution is optimized by...
Apparatus and method for streamlining data transfer with existing
An efficient memory retrieval/storage schemes for a fault tolerant memory control system for a computer system having a host processor, a mass storage memory and...
Apparatus and method for generating a stride used to derive a prefetch
A central processing unit (CPU) of a computer has a data caching unit which includes a novel dual-ported prefetch cache configured in parallel with a ...
Method and apparatus for fetching information from a cache memory
The present invention relates to a method and apparatus for efficiently outputting words from an N-way set-associative cache. In one embodiment, the cache tags...
Method and apparatus for dynamic cache preloading across a network
A caching server that provides faster access times for independently operating network elements. The caching server initiates information transfer and holds the...
Generation isolation system and method for garbage collection
Architectural support for generation isolation is provided through trapping of intergenerational pointer stores. Identification of pointer stores as ...
Method and apparatus for visually indicating status of a dataset when
presenting portions of the dataset
Methods, systems, apparatus and computer program products are disclosed that provide users of programmed applications with a visual indication of a state...
Method and apparatus for searching for documents stored within a
document directory hierarchy
A method for searching a document directory hierarchy which partitions a user-initiated search. The document directory hierarchy comprises a plurality of...
High resolution color computer display to be worn on the head of an
An arrangement for displaying the output of an electronic system such as a computer including a light gate array having a column of light windows; apparatus for...
Overshoot/undershoot protection scheme for low voltage output buffer
Methods and circuitry for implementing output buffers with low voltage CMOS transistors capable of handling signal overshoot and undershoot conditions. The...
Top frame of walker
Reducing data dependent conflicts by converting single precision
instructions into microinstructions using...
In an out-of-order processor having single-precision floating-point registers aliased into double-precision floating-point registers, a single-precision...
Apparatus and method for reducing data bus pin count of an interface
while substantially maintaining performance
The pin count of a processor is substantially reduced while effectively maintaining processor performance by using a staging register to receive and store a...
Method and apparatus for optimizing the null pointer exception in an
object-oriented programming environment...
Apparatus, methods, systems and computer program products are disclosed that improve the efficiency of mutator programs and garbage collection programs that...
Multiprocessor distributed memory system and board and methods therefor
A data processing system comprises a plurality of nodes and a serial data bus interconnecting the nodes in series in a closed loop, for passing address and data...
Method and apparatus for system building with a transactional interpreter
A method and apparatus for system building with a transactional interpreter. Unlike interpreters of the prior art, a transactional interpreter permits large...
System and method for a quality of service in a multi-layer network
A multi-layer network element for forwarding received packets from an input port to one or more output ports with quality of service. When output queues exceed...
Radio frequency tracking system
A method and apparatus is disclosed for transmitting data about an object within a defined field and using the transmitted data to generate a virtual object on...
Apparatus and method for automatically adjusting computer display
parameters in response to ambient light and...
An apparatus to automatically adjust, in accordance with a set of user preferences, a computer display parameter, such as brightness or contrast, in response to...
MOS devices with retrograde pocket regions
Disclosed is a low threshold asymmetric MOS device having a pocket region with a graded concentration profile. The pocket region includes a relatively high...
Unitary shoe bottom
A unitary hollow shoe bottom comprises a bottom and a sidewall integrally molded with the bottom and extends upwardly to form a cavity and a periphery top edge...
System and method for self-referential accesses in a multiprocessor
A fault-tolerant computer architecture is described wherein the effect of hardware faults is diminished. The architecture employs a main data bus having a...
System for responding to a resource request
A trigger is provided in association with a network naming service, such as DNS (Domain Name Service), that handles client requests for an application. The...
Method for stack-caching method frames
The present invention includes methods for caching method frames using multiple stack cache management units to provide access to multiple portions of the method...
Virtual machine with securely distributed bytecode verification
A system for executing a software application comprising a plurality of hardware independent bytecodes is provided comprising a computing system that generates...
Method and apparatus for transferring data from devices not supporting
burst data transfers in burst mode
A method and apparatus for transferring data between devices on a bus is described, the apparatus comprising a producer device having an output, and a first data...
Method and apparatus for timely delivery of a byte code and serialized
A method and apparatus for timely delivery of classes and objects is provided. A header comprising timing information is attached to said classes and/or objects....
Log file optimization in a client/server computing system
In a client/server computing system, a method and apparatus for efficiently storing entries in a log file during disconnected client operations. An encoder...
Method and apparatus for achieving perfect forward secrecy in closed
A method and apparatus for generating additional implicit keys from a key [K.sub.ij ].sub.N without the necessity of generating a new Diffie-Helman (DH)...
Sub-threshold leakage tuning circuit
To compensate for process, activity and temperature-induced device threshold variations in a semiconductor circuit having a transistor, a potential of the gate...
Low voltage CMOS input buffer with undershoot/overshoot protection
Method and circuitry for implementing low voltage input buffers using low voltage CMOS transistors are disclosed. Various novel circuit techniques enable the...
Apparatus and method for programmable delays using a boundary-scan chain
The invention is a system that provides programmable clock delays for logic circuits. The system makes use of the boundary-scan register chain incorporated into...
Apparatus for accelerating digital signal transitions using a transition
acceleration circuit and a transition...
A circuit for accelerating digital signal transitions includes an input/output node to receive a digital input signal. A transition termination circuit is...