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Patent # Description
US-6,510,164 User-level dedicated interface for IP applications in a data packet switching and load balancing system
A multiprocessor computer system comprises a plurality of network interfaces each adapted to be coupled to respective external networks for receiving and sending...
US-6,510,061 Electric facility having an anti-electromagnetic interference device
An electric facility a cover secured on a primary circuit board and having one or more orifices, a secondary circuit board disposed on the primary circuit board...
US-6,510,050 High density packaging for multi-disk systems
A substrate for packaging a storage or server system may include one or more sections of the substrate configured to hold a two-dimensional array of disk drives....
US-6,509,785 Voltage regulator circuit for attenuating inductance-induced on chip supply variations
An active digital voltage regulator circuit is a two terminal device that is connected in shunt to first and second power supply input lines. The active digital...
US-6,509,765 Selectable resistor and/or driver for an integrated circuit with a linear resistance
One embodiment of the present invention provides resistor within an integrated circuit with a substantially linear resistance. This resistor includes a...
US-6,508,751 Method and apparatus for preforming and creasing container board
A method and apparatus for preparing container board having a corrugated medium and at least one liner formed thereon for folding which comprises a tool for...
US-6,508,008 Running type road surface shape measuring apparatus
A running type road surface shape measuring apparatus for measuring the unevenness and grade of road surface in the longitudinal and transverse directions during...
US-D469,216 Hair dryer
US-D469,084 Computer rack enclosure
US-6,507,935 Method of analyzing crosstalk in a digital logic integrated circuit
An automated method of analyzing crosstalk in a digital logic integrated circuit on a digital computer is described. The method uses available software to make...
US-6,507,934 Apparatus and method for source synchronous link testing of an integrated circuit
An apparatus or method for testing the setup time and hold time specifications of a chip. An apparatus according to the invention would include a first chip, a...
US-6,507,925 Spatial and temporal alignment of a scan dump for debug of scan-based designs
A method for analyzing a scan dump assigns a first latch to a first value, compares the first latch output to the first value for spatial alignment. The method...
US-6,507,908 Secure communication with mobile hosts
A method for secure data communication with a mobile machine in which a data packet is received from the mobile machine having a particular network address. A...
US-6,507,862 Switching method in a multi-threaded processor
A processor includes logic for attaining a very fast exception handling functionality while executing non-threaded programs by invoking a multithreaded-type...
US-6,507,857 Extending the capabilities of an XSL style sheet to include components for content transformation
Systems and methods consistent with the present invention use a Namespace paradigm to define an external component reference to a style sheet. When the style...
US-6,507,810 Integrated sub-network for a vehicle
An integrated sub-network for a vehicle. The sub-network includes one or more devices which are addressable using IP addresses or object terminology. The...
US-6,507,562 DYNAMIC OPTIMIZATION FOR RECEIVERS USING DISTANCE BETWEEN A REPAIR HEAD AND A MEMBER STATION IN A REPAIR GROUP...
Receiver stations located close together in a computer network dynamically form a multicast repair tree by a plurality of receiver stations choosing a repair...
US-6,506,940 Process for converting stereoisomers of sertraline into sertraline
A process for converting the cis (1R, 4R), trans (1S, 4R), and trans (1R, 4S) stereoisomers of sertraline into sertraline comprises, starting with an initial...
US-D468,741 Computer display device
US-6,505,317 System and method for testing signal interconnections using built-in self test
A system and method for testing signal interconnections using built-in self test (BIST). BIST functionality is designed into the various chips of a computer...
US-6,505,275 Method for scalable memory efficient thread-local object allocation
A memory allocation scheme for object allocation in concurrent object-oriented server-side environments that combines the time efficiency of thread-local...
US-6,505,253 Multiple ACK windows providing congestion control in reliable multicast protocol
A multicast repair tree is established, the repair tree having one sender station and a plurality of repair head stations. A repair head station has an...
US-6,505,224 System and computer-implemented method for performing multi-stage fast Walsh transform
A system for generating a Walsh transform output vector from an "N"-component input vector includes a vector store, a plurality of Walsh transform kernels and a...
US-6,504,728 Protective device for installing CPCI microprocessor boards
A Compact Personal Computer Interface (CPCI) microprocessor board installation device is disclosed herein. A preferred aspect comprises an inner surface defined...
US-6,504,486 Dual voltage sense cell for input/output dynamic termination logic
A process tracking reference voltage generator has been developed for an input/output system. The voltage generator includes a driver component that transmits an...
US-6,504,340 Hands-free kit for mobile phones using solar cell
Disclosed herein is a hands-free kit for mobile phones using a solar cell. The hands-free kit has a solar cell, a charging unit, and a power switch. The solar...
US-6,504,266 Method and apparatus for powering up an electronic system after AC power has been removed
In an electronic system with multiple power supplies, a method and apparatus dynamically determines the number of power supplies required to power up the system...
US-6,503,317 Dye based aqueous pigment dispersions
Aqueous based pigment dispersions wherein the pigment is dispersed in a dispersant dye in the absence of any other dispersant or additive and aqueous based...
US-6,502,628 Method and apparatus for undirectional coolant flow control unit for pressurized cooling systems
The present invention is a method and apparatus for unidirectional coolant flow control unit for pressurized cooling systems. The invention comprises a valve on...
US-6,502,419 Electro-desorption compressor
A electro-desorption compression system according to the present invention comprises an enclosure which includes first and second spaced-apart electrical...
US-6,502,212 Method and apparatus for bus parameter optimization using probes of system configurations
A bus tuning system is provided for determining the configuration of an electronic device and for testing and tuning a bus system of the electronic device...
US-6,502,051 Method and apparatus for optimizing testing sequences for electronic equipment
Testing of an electronic system is optimized by using a single set of sub-tests and varying the testing sequence to produce tests tailored for different purposes...
US-6,501,660 Reliable card detection in a CPCI system
A CPCI system is adapted to reliably detect the presence of all front cards, whether hot swappable or not. The system includes a line that is used to detect the...
US-6,501,328 Method for reducing peak to peak jitter in a dual-loop delay locked loop
A method for reducing power supply noise in the power supply system of a delay locked loop has been developed. The method includes powering up a delay locked...
US-6,501,302 Single-input/dual-output sense amplifier
A single-input/dual output sense amplifier includes cross-coupled transistors connected to a reference voltage; a first input transistor and a second input...
US-6,501,295 Overdriven pass transistors
Programmable logic structures include logic blocks that operate at very low supply voltages. According to the invention, a pass transistor is positioned between...
US-6,500,696 Face to face chip
An integrated circuit device includes first and second arrays of semiconductor dice. Each array of dice is arranged in face-to-face relation to the other array...
US-6,500,075 Golf training system for teaching target aim and swing path alignment
A golf training system which utilizes a pair of hinged panels which are placed on the practice surface at a selected angularity in an inverted "V" to provide a...
US-6,499,960 Control circuit for a heat-dissipation fan
A control circuit for controlling the rotational speed of a heat-dissipation fan for an electronic device, the circuit including a temperature sensing circuit...
US-6,499,135 Computer aided design flow to locate grounded fill in a large scale integrated circuit
For an integrated circuit having multiple metal layers, a computer-aided design (CAD) method for designing grounded fill in the integrated circuit includes: (a)...
US-6,499,113 Method and apparatus for extracting first failure and attendant operating information from computer system devices
Information regarding the operating conditions of a computer system is stored in a storage which is dedicated to a failure management system. The storage is...
US-6,499,097 Instruction fetch unit aligner for a non-power of two size VLIW instruction
The present invention provides an instruction fetch unit aligner. In one embodiment, an apparatus for an instruction fetch unit aligner includes selection logic...
US-6,499,049 Lease renewal service
In accordance with methods and systems consistent with the present invention, a lease manager is provided for managing leases between clients and other network...
US-6,499,048 Control of multiple computer processes using a mutual exclusion primitive ordering mechanism
A program controlled apparatus includes one or more units for executing a multiple process. A mutex ordering mechanism controls the ordering of mutex ownership...
US-6,498,722 Disk drive isolation mount
An isolation mounting system attaches a computer component, such as a disk drive, to the structure of a computer system. In an embodiment, the isolation mounting...
US-6,498,520 Minimizing the effect of clock skew in precharge circuit
A system for minimizing the effect of clock skew in a precharge circuit includes a switch coupled between an input to the precharge circuit and a global bitline;...
US-6,498,516 Minimizing the effect of clock skew in bit line write driver
A system for minimizing the effect of clock skew in a bit line write driver includes a first control circuit coupled to the bit line write driver; and a second...
US-6,498,290 Conversion of solar energy
An array of elongated concave parabolic trough-shaped reflectors is disclosed. The orientation of the array is biaxially kept essentially perpendicular to rays...
US-6,497,110 Refrigeration system for electronic components having environmental isolation
To cool heat-emitting electronic components, a compact, non-moving-parts compressor, an evaporator in juxtaposition to the electronic components and a condenser...
US-6,496,955 Latch mapper
A method for constructing a latch mapping between a first level description and a second level description of a digital system, wherein the first level...
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