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Patent # Description
US-6,525,725 Morphing decompression in a graphics system
A method and graphics system configured to perform real-time morphing of three-dimensional (3D) objects that have been compressed into one or more streams of 3D...
US-6,525,723 Graphics system which renders samples into a sample buffer and generates pixels in response to stored samples...
A computer graphics system that utilizes a super-sampled sample buffer and a programmable sample-to-pixel calculation unit for refreshing the display, wherein...
US-6,525,722 Geometry compression for regular and irregular mesh structures
A method for compressing 3D geometry data that is capable of compressing both regularly tiled and irregularly tiled surfaces is disclosed. In one embodiment, the...
US-6,525,622 Adding electrical resistance in series with bypass capacitors to achieve a desired value of electrical...
Apparatus and methods for achieving a desired value of electrical impedance between parallel planar conductors of an electrical power distribution structure by...
US-RE38,004 Universal AC sequencer for a server
An AC sequencer receives source AC voltage via a sequence-mounted universally accepted connector, such as an IEC 309 compatible connector. Source AC is coupled...
US-6,523,141 Method and apparatus for post-mortem kernel memory leak detection
Methods and apparatus for detecting and reporting memory leaks associated with an operating system are disclosed. In accordance with one aspect of the present...
US-6,523,091 Multiple variable cache replacement policy
A method for selecting a candidate to mark as overwritable in the event of a cache miss while attempting to avoid a write back operation. The method includes...
US-6,523,090 Shared instruction cache for multiple processors
The present invention provides a shared instruction cache for multiple processors. In one embodiment, an apparatus for a microprocessor includes a shared...
US-6,523,059 System and method for facilitating safepoint synchronization in a multithreaded computer system
Methods and apparatus for facilitating a global safepoint operation in a multithreaded computer system are disclosed. According to one aspect of the present...
US-6,522,327 Decompression of variable-length encoded compressed three-dimensional graphics data
Three-dimensional compressed geometry is decompressed with a unit having an input FIFO receiving compressed data bits and outputting to an input block state...
US-6,522,326 Decompression of quantized compressed three-dimensional graphics data
Three-dimensional compressed geometry is decompressed with a unit having an input FIFO receiving compressed data bits and outputting to an input block state...
US-6,522,270 Method of coding frequently occurring values
A method for significantly decreasing the number of times prior art coding schemes, such as variable length coding, are implemented in the course of ...
US-6,521,846 Method for assigning power and ground pins in array packages to enhance next level routing
A method for assigning power and ground pins in array packages in order to enhance next level routing is provided. In one embodiment, the method comprises...
US-6,520,805 Memory module with offset notches for improved insertion and stability and memory module connector
A memory module with offset notches for improved insertion and a memory module connector for mating thereto. The connector housing includes an accommodating s...
US-6,519,756 Method and apparatus for building an integrated circuit
A method and apparatus for building an integrated circuit. A description of the logical operation of a module in a hardware description language is provided,...
US-6,519,747 Method and apparatus for defining signal timing for an integrated circuit device
One embodiment of the present invention provides a system for defining signal timing for an integrated circuit device. The system operates by first creating a...
US-6,519,717 Mechanism to improve fault isolation and diagnosis in computers
A system and method for improving the isolation and diagnosis of hardware faults in a computing system wherein means are provided for indicating whether unusable...
US-6,519,704 System and method for driving a signal to an unbuffered integrated circuit
A fault-tolerant computer architecture is described wherein the effect of hardware faults is diminished. The architecture employs a main data bus having a...
US-6,519,702 Method and apparatus for limiting security attacks via data copied into computer memory
A system for limiting security attacks on a computer system that operate by executing computer instructions embedded in data received from an external source....
US-6,519,694 System for handling load errors having symbolic entity generator to generate symbolic entity and ALU to...
In a RISC or CISC processor supporting the IEEE 754 Not-a-Number (NaN) standard and of the kind comprising a load/store unit, a register unit and an arithmetic...
US-6,519,646 Method and apparatus for encoding content characteristics
A method and apparatus for encoding characteristics for the retrieval of information. Depending on the characteristics, some methods for retrieving information...
US-6,519,615 Method and system for leasing storage
A method and system for leasing storage locations in a distributed processing system is provided. Consistent with this method and system, a client requests...
US-6,519,584 Dynamic display advertising
Advertising displays such as found in mass transit vehicles or stations or in electronic newspapers are provided with user directed search capabilities. Selected...
US-6,519,140 Hinged bezel for a computer system
A bezel assembly for a computer enclosure includes a bezel and a hinge capable of hingedly joining the bezel to the computer enclosure. A computer system...
US-6,518,792 Method and circuitry for a pre-emphasis scheme for single-ended center taped terminated high speed digital...
A method and circuitry for pre-emphasizing transmitted logic signals. The method and circuitry may be applied to single-ended center-taped terminated I/O lines....
US-6,517,247 Positioning structure of bearing and axle tube
A positioning structure of a bearing and an axle tube, wherein, the positioning hole of the axle tube has a periphery formed with an oil storage space...
US-D470,273 Make-up case
US-RE37,987 Method and apparatus for selectively unmanaging elements on a network
Elements on a network are selectively unmanaged by a network manager. An element is not managed when it is placed in a Pending state. Traps and events from the...
US-6,516,449 Methodology to create integrated circuit designs by replication maintaining isomorphic input output and fault...
The present invention teaches a method for designing an integrated circuit. The design of the integrated circuit is replicated a number of times. The number of...
US-6,516,422 Computer system including multiple clock sources and failover switching
A system and method for providing redundant, synchronized clocks in a computer system. Upon a failure of a master clock signal, the system switches over to a...
US-6,516,354 Method and apparatus for efficient representation of variable length identifiers in a distributed object system
In a CORBA distributed object system, potential object name ambiguities in the Portable Object Adapter are resolved without using variable-length object...
US-6,516,349 System for updating a set of instantiated content providers based on changes in content provider directory...
A content provider manager has been develop for use in an information services such as a portal or desktop application to provide for "pluggable" content that...
US-6,516,344 Reducing network traffic for remote file system accesses by keeping track of unallocated regions in files
A system for reducing network traffic for remote file system accesses receives requests at a local computer system for access to a file on the remote server. If...
US-6,515,527 Method for smoothing dI/dT noise due to clock transitions
A method for increasing a transition time period for an edge transition of a clock signal has been developed. The method includes detecting an edge transition of...
US-6,515,501 Signal buffers for printed circuit boards
An improved signal buffer configuration has been developed for transmitting communication signals across line traces between ICs on a printed circuit board,...
US-D469,778 Computer housing bezel
US-6,513,156 Interpreting functions utilizing a hybrid of virtual and native machine instructions
Systems and methods for increasing the execution speed of virtual machine instructions for a function are provided. A portion of the virtual machine instructions...
US-6,513,047 Management of user-definable databases
A method and computer program product for managing and manipulating user-defined and system databases in a computing system. A database interface, which can be a...
US-6,512,840 Digital encoding of personal signatures
The signature comparison process associated with bank approval processes is automated using signature capture devices and a stored database of valid signatures....
US-6,512,712 Memory read circuitry
A circuit on a semiconductor for precharging a local bitline and a global bitline. The circuit includes: a precharge input; a first switch, the gate of the first...
US-6,512,704 Data strobe receiver
A data strobe receiver that includes a first comparator. The first comparator has a first input that is coupled to a first reference voltage. The first...
US-6,512,467 Method and apparatus for dynamically configuring device using device code
The invention is a method and apparatus for configuring a first device based on a code associated with a second device. In accordance an embodiment of the...
US-D469,574 Hair dryer
US-6,510,545 Automated shielding algorithm for dynamic circuits
An automated shielding tool, algorithm, and design methodology for shielding integrated circuits is disclosed herein. This is accomplished by inserting VDD and...
US-6,510,523 Method and system for providing limited access privileges with an untrusted terminal
A method and system for providing limited access privileges with an untrusted terminal allows a user to perform privileged operations between the untrusted...
US-6,510,511 Methods and apparatus for branch prediction using hybrid history with index sharing
A branch prediction scheme predicts whether a computer instruction will cause a branch to a non-sequential instruction. A prediction counter is selected by...
US-6,510,498 Method and apparatus for memory allocation in a multi-threaded virtual machine
Methods and apparatus for the efficient allocation of shared memory in a multi-threaded computer system are disclosed. In accordance with one embodiment of the...
US-6,510,461 System for managing and automatically deleting network address identified and stored during a network...
A network address is captured from a source document or signal and is stored in a data structure such as a list for subsequent use. When a network resource at...
US-6,510,460 Method and apparatus for enforcing locking invariants in multi-threaded systems
In order to maintain locking invariants in a multi-threaded system, a special inverse lock class is defined whose constructor stores a reference to, and then...
US-6,510,437 Method and apparatus for concurrent thread synchronization
Methods and apparatus for locking and unlocking objects using synchronized threads are disclosed. According to one aspect of the present invention, a ...
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