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Patent # Description
US-6,542,990 Array access boundary check by executing BNDCHK instruction with comparison specifiers
The present invention provides a method and apparatus for executing a boundary check instruction that provides accelerated bound checking. The instruction can be...
US-6,542,988 Sending both a load instruction and retrieved data from a load buffer to an annex prior to forwarding the load...
A processor performs precise trap handling for out-of-order and speculative load instructions. It keeps track of the age of load instructions in a shared scheme...
US-6,542,978 Externally identifiable descriptor for standard memory allocation interface
The invention noninvasively provides information relating to memory space allocation. Memory space allocation information is maintained in a location that is...
US-6,542,932 Domain access control for logging systems
A method of and system for control of access to add an event notification as a log record in a computer system. Each potential log record is associated with one...
US-6,542,920 Mechanism for implementing multiple thread pools in a computer system to optimize system performance
A mechanism is disclosed for implementing multiple thread pools in a computer system to optimize system performance. In accordance with the invention, a...
US-6,542,911 Method and apparatus for freeing memory from an extensible markup language document object model tree active in...
The present invention relates to a garbage collector that uses an LRU algorithm to free memory from an XML DOM tree active in an application cache. According to...
US-6,542,900 Method and apparatus for distributed object mapping in a java language environment
A method and apparatus for performing distributed object mapping in a Java language environment includes creating a first object associated with a first language...
US-6,542,899 Method and system for expressing information from an object-oriented database in a grammatical form
A grammar to represent a hierarchical object-oriented database. The grammar comprises a set of keywords and a syntax. The keywords include "tree", "entry",...
US-6,542,845 Concurrent execution and logging of a component test in an enterprise computer system
A method of concurrently performing a component test with returning test result data in a distributed environment is disclosed. In general, in order to assure...
US-6,542,515 Profile service
A mechanism for managing a plurality of profile data structures including a plurality of profile objects having an interface for sending and receiving ...
US-6,542,384 Riser card local EMI shield for a computer chassis
A shielded riser card assembly for reducing electromagnetic radiation from a computer enclosure is disclosed. The riser card assembly comprises a four-layer...
US-6,542,362 Computer system housing configuration
A computer system housing with a curved bezel that forms one or more sideways gap between a side of the computer housing chassis and the bezel attached to that...
US-6,542,026 Apparatus for on-chip reference voltage generator for receivers in high speed single-ended data link
An on-chip DC voltage generator providing a marginable reference voltage signal is described. The present invention is a CMOS-based integrated circuit that...
US-6,541,873 90 degree bump placement layout for an integrated circuit power grid
A 90 degree bump placement layout for an integrated circuit power grid is provided. This layout improves integrated circuit performance and reliability and gives...
US-6,541,579 Free radical inhibitors for quenching aqueous phase polymer growth and related methods
An aqueous phase inhibitor for quenching free radical polymerization comprising a free radical quenching agent having a hydrophilic tail is disclosed, as well as...
US-6,540,800 Abrasive particles with metallurgically bonded metal coatings
An abrasive composite particle comprising a cubic abrasive core particle encapsulated within a deposit of hexagonal metallurgical bond forming material...
US-6,539,486 Processing and alarm circuitries each having different power supply unit(s) requirement and powering the...
A computer system includes processing circuitry and alarm circuitry connectable to a network. A power sub-system includes at least three power supply units,...
US-6,539,482 Network access authentication system
A network access authentication system including a directory service containing a remote access password and a standard access password for each user of the...
US-6,539,059 Apparatus and method for efficiently scalable digital video decoding
An apparatus for decoding a Motion Compensated-Discrete Cosine Transform (MC-DCT) video stream includes an input port to receive an MC-DCT video stream with an...
US-6,538,903 Method and apparatus for reducing electromagnetic radiation from a computer enclosure
A method and apparatus for reducing electromagnetic radiation emanating from a computer enclosure are disclosed, for application to computer enclosure enclosing...
US-6,538,668 Distributed settings control protocol
A distributed settings control protocol. One or more embodiments of the invention provide the ability for an application running on a server across a network to...
US-6,538,657 High-performance band combine function
A high-performance band combine function to transform a source image of n bands to a destination image of m bands. A source image vector is multiplied with a...
US-6,538,461 System and method for testing integrated passive components in a printed circuit board
The problems outlined above may in large part be solved by a system and method for testing integrated passive components in a printed circuit board. In one...
US-6,537,362 Polyphosphoric acid swelling of organic pigments
A method of conditioning an organic crude pigment by treating, under high shear, 1 part by weight of the crude pigment and about 0.5 to 1.9 parts by weight of...
US-6,537,315 Auxiliary artificial heart of an embedded type
An artificial heart has a driving section, a nozzle section, a pump section for insertion into a ventricle of a human heart, and a sealing section forming a seal...
US-6,536,022 Two pole coupling noise analysis model for submicron integrated circuit design verification
An automated method of analyzing crosstalk in a digital logic integrated circuit, the method operating on a digital computer, is described. The method uses...
US-6,536,000 Communication error reporting mechanism in a multiprocessing computer system
A multiprocessing computer system includes a plurality of processing nodes, each having one or more processors, a memory, and a system interface. The plurality...
US-6,535,990 Method and apparatus for providing fault-tolerant addresses for nodes in a clustered system
One embodiment of the present invention provides a system that facilitates communications between a cluster of nodes within a clustered computing system in a...
US-6,535,968 Apparatus, system, and method for reducing bus contention during consecutive read-write operations
An apparatus, system, and method for speeding up data transfers while reducing bus contention during repeated consecutive read-write operations. By reducing the...
US-6,535,966 System and method for using a page tracking buffer to reduce main memory latency in a computer system
A memory controller for a memory subsystem of a computer system connects to a processor bus. The memory controller is for use with memory devices such as RDRAM...
US-6,535,945 Method and apparatus for programmable adjustment of computer system bus parameters
A system for programmatically adjusting electrical characteristics of a bus interface so as to modify bus operating and signaling parameters employs a control...
US-6,535,929 Universal communication mechanism for applications running in a multitasking environment
Communication between application programs is facilitated by a virtual device driver to which the application programs make function calls. The device driver...
US-6,535,894 Apparatus and method for incremental updating of archive files
According to aspects of the present invention, an original archive file having one or more entries is created, where each entry in the original archive file is...
US-6,535,220 Static and dynamic video resizing
A graphics system comprises a texture memory, a rendering engine, a sample buffer and a filtering engine. The rendering engine renders received primitives based...
US-6,535,020 Output buffer with compensated slew rate and delay control
A circuit includes a drive transistor coupled between an output and a first potential, a constant current circuit coupled between the gate of the drive...
US-6,534,872 Apparatus and system with increased signal trace routing options in printed wiring boards and integrated...
An apparatus and system comprising electrical interconnection devices (EIDs), such as printed wiring boards, semiconductor packages, and printed circuit boards,...
US-6,534,090 Oral osmotic controlled drug delivery system for a sparingly soluble drug
The present invention is for an oral osmotic controlled drug delivery system for a sparingly soluble drug comprising: a. a core comprising (i) finely particulate...
US-6,532,570 Designing integrated circuits to reduce temperature induced electromigration effects
A method of designing an integrated circuit calculates the current density in each metal lead. The method can calculates a mean time to failure for at least one...
US-6,532,554 Network event correlation system using formally specified models of protocol behavior
An event correlation system for network management has computer code for at least one model of a process to be run on a node of a network, where said process is...
US-6,532,531 Method frame storage using multiple memory circuits
A memory architecture in accordance with an embodiment of the present invention improves the speed of method invocation. Specifically, method frames of method...
US-6,532,485 Method and apparatus for performing multiplication/addition operations
An apparatus for multiplying a first number and a second number together is described, each of the numbers having a width of 8, 16, 32, 64 or 128-bits or more....
US-6,532,484 Parallel system and method for performing fast fourier transform
A parallel FFT generating system is disclosed for generating a Fast Fourier Transform (FFT) of an input vector. The parallel FFT generating system includes a...
US-6,532,477 Method and apparatus for generating an audio signature for a data item
A system generates an audio signature for a data item based on a source identifier associated with the data item. The system receives a source identifier along...
US-6,532,439 Method for determining the desired decoupling components for power distribution systems
A method for determining the desired decoupling components for stabilizing the electrical impedance in the power distribution system of an electrical ...
US-6,532,021 Opaque screen visualizer
Rendered wire frame models of objects offered for sale can be downloaded and displayed as virtual objects in the context of an environment in which a real object...
US-6,532,012 Geometry instructions for graphics data compression
In a compression system, three-dimensional geometry is first represented as a generalized triangle mesh, a data structure that allows each instance of a vertex...
US-6,530,989 Methods for production of organic pigments for printing inks
A process for the preparation of an organic pigment dispersion is disclosed and consists of dispersing a dried soft-textured organic pigment in a dispersion...
US-6,530,080 Method and apparatus for pre-processing and packaging class files
A method and apparatus for pre-processing and packaging class files. Embodiments remove duplicate information elements from a set of class files to reduce the...
US-6,530,017 System and method providing an arrangement for efficiently emulating an operating system call
An operating system call control subsystem is disclosed for use in a computer that includes a processor for processing a program, the program instructions of an...
US-6,529,982 Locking of computer resources
A computer processor includes a number of register pairs LOCKADDR/LOCKCOUNT. In each pair, the LOCKADDR/LOCKCOUNT register is to hold a value that identifies a...
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