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Patent # Description
US-6,534,872 Apparatus and system with increased signal trace routing options in printed wiring boards and integrated...
An apparatus and system comprising electrical interconnection devices (EIDs), such as printed wiring boards, semiconductor packages, and printed circuit boards,...
US-6,534,090 Oral osmotic controlled drug delivery system for a sparingly soluble drug
The present invention is for an oral osmotic controlled drug delivery system for a sparingly soluble drug comprising: a. a core comprising (i) finely particulate...
US-6,532,570 Designing integrated circuits to reduce temperature induced electromigration effects
A method of designing an integrated circuit calculates the current density in each metal lead. The method can calculates a mean time to failure for at least one...
US-6,532,554 Network event correlation system using formally specified models of protocol behavior
An event correlation system for network management has computer code for at least one model of a process to be run on a node of a network, where said process is...
US-6,532,531 Method frame storage using multiple memory circuits
A memory architecture in accordance with an embodiment of the present invention improves the speed of method invocation. Specifically, method frames of method...
US-6,532,485 Method and apparatus for performing multiplication/addition operations
An apparatus for multiplying a first number and a second number together is described, each of the numbers having a width of 8, 16, 32, 64 or 128-bits or more....
US-6,532,484 Parallel system and method for performing fast fourier transform
A parallel FFT generating system is disclosed for generating a Fast Fourier Transform (FFT) of an input vector. The parallel FFT generating system includes a...
US-6,532,477 Method and apparatus for generating an audio signature for a data item
A system generates an audio signature for a data item based on a source identifier associated with the data item. The system receives a source identifier along...
US-6,532,439 Method for determining the desired decoupling components for power distribution systems
A method for determining the desired decoupling components for stabilizing the electrical impedance in the power distribution system of an electrical ...
US-6,532,021 Opaque screen visualizer
Rendered wire frame models of objects offered for sale can be downloaded and displayed as virtual objects in the context of an environment in which a real object...
US-6,532,012 Geometry instructions for graphics data compression
In a compression system, three-dimensional geometry is first represented as a generalized triangle mesh, a data structure that allows each instance of a vertex...
US-6,530,989 Methods for production of organic pigments for printing inks
A process for the preparation of an organic pigment dispersion is disclosed and consists of dispersing a dried soft-textured organic pigment in a dispersion...
US-6,530,080 Method and apparatus for pre-processing and packaging class files
A method and apparatus for pre-processing and packaging class files. Embodiments remove duplicate information elements from a set of class files to reduce the...
US-6,530,017 System and method providing an arrangement for efficiently emulating an operating system call
An operating system call control subsystem is disclosed for use in a computer that includes a processor for processing a program, the program instructions of an...
US-6,529,982 Locking of computer resources
A computer processor includes a number of register pairs LOCKADDR/LOCKCOUNT. In each pair, the LOCKADDR/LOCKCOUNT register is to hold a value that identifies a...
US-6,529,919 Incremental class unloading in a train-algorithm-based garbage collector
A garbage collector collects a train-managed heap in accordance with the train algorithm. In doing so, it concentrates into a respective train the heap-located...
US-6,529,518 Method and apparatus for providing a network interface
A network adapter includes a bypass buffer with sufficient capacity to store a packet from an upstream neighboring adapter and to store at least one additional...
US-6,529,057 Stretching, shortening, and/or removing a clock cycle
A method and apparatus for stretching and/or shortening a clock cycle uses a multiplexor stage, in which a multiplexor switches between a normal clock signal and...
US-6,528,974 Method and apparatus for reducing power consumption
A power supply is provided. The power supply is comprised of a first power module, a second power module, and a controller. The first power module is capable of...
US-6,528,445 Dielectric ceramic composition and method for manufacturing the same
Disclosed is a dielectric ceramic composition suitable for use in planar or multilayer type electronic parts containing inner conductors, for the fabrication of...
US-6,527,982 Wood preservative additive composition
A wood preservative additive composition which is effective against wood rot fungi (brown rot fungi, white rot fungi, soil bacteria and soft rot fungi), does not...
US-6,527,522 Heat dissipation fan structure
A heat dissipation fan structure includes a base plate provided with an air outlet which is provided with a bottom plate. The bottom plate is provided with a...
US-6,526,570 File portability techniques
Systems and methods for building a platform specific compiler in a multi-platform environment are provided. A set of user defined platform dependent compiler...
US-6,526,552 Long line receiver for CMOS integrated circuits
A clamping circuit which is connected to each long line, preferably adjacent the receiver. The clamping circuit biases the long line at the trigger threshold of...
US-6,526,549 Hierarchical parasitic capacitance extraction for ultra large scale integrated circuits
A method for extracting parasitic capacitance from an integrated circuit layout includes decomposing nets in the integrated circuit layout into conductive...
US-6,526,494 Method and apparatus for space-efficient inter-process communication
A computer-implemented method and apparatus in a computer system for inter-process communication. A first procedure allocates a first buffer in a first memory...
US-6,526,485 Apparatus and method for bad address handling
Circuitry including a request queue and a bad address handling circuit. The request queue includes an entry for each outstanding load requesting access to a...
US-6,526,422 Striding-type generation scanning for parallel garbage collection
A multiprocessor, multi-program, stop-the-world garbage collection program is described. The system initially over partitions the root sources, and then...
US-6,526,055 Method and apparatus for longest prefix address lookup
A method and apparatus that constructs a "router database" and then uses the database to determine a longest match between a piece of target data, such as an...
US-6,526,022 Detecting congestion by comparing successive loss of packets in windows to provide congestion control in...
A method of detecting congestion in a computer network uses a receiving station which determines a first number of messages missing in a first acknowledgment...
US-6,525,938 Circuit board fixing structure of heatsink fan
A circuit board fixing structure of a heatsink fan includes a housing having a pivot portion having a periphery provided with multiple poles. The housing is...
US-6,525,930 Mounting media drives in a computer system on a carriage
A carriage, provided with a mounting for one or more media devices is slideably mountable in a system unit (for example a computer system unit) such that the...
US-6,525,725 Morphing decompression in a graphics system
A method and graphics system configured to perform real-time morphing of three-dimensional (3D) objects that have been compressed into one or more streams of 3D...
US-6,525,723 Graphics system which renders samples into a sample buffer and generates pixels in response to stored samples...
A computer graphics system that utilizes a super-sampled sample buffer and a programmable sample-to-pixel calculation unit for refreshing the display, wherein...
US-6,525,722 Geometry compression for regular and irregular mesh structures
A method for compressing 3D geometry data that is capable of compressing both regularly tiled and irregularly tiled surfaces is disclosed. In one embodiment, the...
US-6,525,622 Adding electrical resistance in series with bypass capacitors to achieve a desired value of electrical...
Apparatus and methods for achieving a desired value of electrical impedance between parallel planar conductors of an electrical power distribution structure by...
US-RE38,004 Universal AC sequencer for a server
An AC sequencer receives source AC voltage via a sequence-mounted universally accepted connector, such as an IEC 309 compatible connector. Source AC is coupled...
US-6,523,141 Method and apparatus for post-mortem kernel memory leak detection
Methods and apparatus for detecting and reporting memory leaks associated with an operating system are disclosed. In accordance with one aspect of the present...
US-6,523,091 Multiple variable cache replacement policy
A method for selecting a candidate to mark as overwritable in the event of a cache miss while attempting to avoid a write back operation. The method includes...
US-6,523,090 Shared instruction cache for multiple processors
The present invention provides a shared instruction cache for multiple processors. In one embodiment, an apparatus for a microprocessor includes a shared...
US-6,523,059 System and method for facilitating safepoint synchronization in a multithreaded computer system
Methods and apparatus for facilitating a global safepoint operation in a multithreaded computer system are disclosed. According to one aspect of the present...
US-6,522,327 Decompression of variable-length encoded compressed three-dimensional graphics data
Three-dimensional compressed geometry is decompressed with a unit having an input FIFO receiving compressed data bits and outputting to an input block state...
US-6,522,326 Decompression of quantized compressed three-dimensional graphics data
Three-dimensional compressed geometry is decompressed with a unit having an input FIFO receiving compressed data bits and outputting to an input block state...
US-6,522,270 Method of coding frequently occurring values
A method for significantly decreasing the number of times prior art coding schemes, such as variable length coding, are implemented in the course of ...
US-6,521,846 Method for assigning power and ground pins in array packages to enhance next level routing
A method for assigning power and ground pins in array packages in order to enhance next level routing is provided. In one embodiment, the method comprises...
US-6,520,805 Memory module with offset notches for improved insertion and stability and memory module connector
A memory module with offset notches for improved insertion and a memory module connector for mating thereto. The connector housing includes an accommodating s...
US-6,519,756 Method and apparatus for building an integrated circuit
A method and apparatus for building an integrated circuit. A description of the logical operation of a module in a hardware description language is provided,...
US-6,519,747 Method and apparatus for defining signal timing for an integrated circuit device
One embodiment of the present invention provides a system for defining signal timing for an integrated circuit device. The system operates by first creating a...
US-6,519,717 Mechanism to improve fault isolation and diagnosis in computers
A system and method for improving the isolation and diagnosis of hardware faults in a computing system wherein means are provided for indicating whether unusable...
US-6,519,704 System and method for driving a signal to an unbuffered integrated circuit
A fault-tolerant computer architecture is described wherein the effect of hardware faults is diminished. The architecture employs a main data bus having a...
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