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Patent # Description
US-6,625,700 Arbitration and select logic for accessing a shared memory
A technique for arbitrating and selecting one access request to a shared memory from among multiple contenders is disclosed. In a first aspect, the invention...
US-6,625,641 Method and apparatus for providing client support without installation of server software
A method and apparatus for supporting a pure client. In an embodiment of the invention, a client process is executing on a local host machine, whereas server...
US-6,625,634 Efficient implementation of multiprecision arithmetic
The present invention provides an efficient implementation of multiprecision arithmetic, such as for a microprocessor. In one embodiment, a method includes...
US-6,625,307 Image decode optimization techniques
In general, a method and apparatus for decoding an encoded digital image is disclosed. An image decoder receives an encoded digital image and determines if the...
US-6,625,206 Simultaneous bidirectional data transmission system and method
A digital communication system is presented implementing a data transmission method which allows each of a pair of communication devices coupled to a...
US-6,624,824 Tilt-scrolling on the sunpad
Scrolling techniques for computing devices are disclosed which respond to the amount of tilt, measured against a reference, experienced by a control unit. The...
US-6,624,823 Graphics system configured to determine triangle orientation by octant identification and slope comparison
A graphics system comprises a rendering unit, a sample buffer, and a sample-to-pixel calculation unit. The rendering unit receives vertices defining a triangle,...
US-6,624,687 Method and structure for supply gated electronic components
A method and structure for supply gating low power electronic components uses low threshold gating transistors. The low power components operate at supply...
US-6,624,664 Clocked full-rail differential logic with sense amplifiers
Modified full-rail differential logic circuits are activated by a delayed clock and include a sense amplifier circuit that is triggered by a second delayed...
US-6,624,240 Low molecular weight polyurethane resins
Disclosed is a polyurethane resin having a number average molecular weight of up to 5,000 which is prepared by reacting a diisocyanate compound with at least one...
US-6,622,242 System and method for performing generalized operations in connection with bits units of a data word
A functional unit is described for selectively performing a number of types of bit rearrangement operations, including a generalized bit reverse operation and a...
US-6,622,231 Method and apparatus for paging data and attributes including an atomic attribute
A digital data processing apparatus configured to selectively transfer data between a primary data storage element and an associated data file on a secondary...
US-6,622,219 Shared write buffer for use by multiple processor units
A shared write back buffer for storing data from a data cache to be written back to memory. The shared write back buffer includes a plurality of ports, each port...
US-6,622,193 Method and apparatus for synchronizing interrupts in a message passing queue oriented bus system
In a message-passing, queue-oriented bus system, a separate interrupt work queue assigned to each interrupt line for each PCI device sends interrupt information...
US-6,622,155 Distributed monitor concurrency control
A system and method is disclosed for synchronizing threads of execution within a distributed computing environment. Threads of execution within a computer spawn...
US-6,621,711 Enclosure for electronics assembly
An enclosure for an electronics assembly, comprises (i) a housing (1) having a recess (36); and (ii) a module (40) for holding one or more components of the...
US-6,621,709 Electronics assembly
An electronics assembly comprises: (i) a frame (1); and (ii) a motherboard (16) that is removable from the frame. One or more motherboards (20) extend in a plane...
US-6,621,708 Electronics assembly including a protective shield
An electronics assembly comprises: (i) a frame (1); (ii) a motherboard (16) that is located within the frame; and (iii) one or more daughterboards (20) that...
US-6,621,472 Low cost virtual reality system
Apparatus is disclosed for viewing computer generated images and for tracking the positions of the user's head and hand. One alternative of the apparatus...
US-6,621,427 Method and apparatus for implementing a doubly balanced code
One embodiment of the present invention provides a system for encoding a dataword into a current codeword within a stream of codewords, wherein each codeword in...
US-6,621,318 Low voltage latch with uniform sizing
Low voltage latches are designed such that all the transistors included in the latch are low threshold transistors and the low threshold transistors have the...
US-6,620,750 Dielectric ceramic composition and method for manufacturing multilayered components using the same
The present invention discloses dielectric ceramic compositions having dielectric properties suitable for high frequency bands, such as microwave and millimetric...
US-6,619,858 Optical interconnect
An optical interconnect is provided that optically connects two adjacent printed circuit boards, or electrical component. The optical interconnect includes a...
US-6,618,855 Caching untrusted modules for module-by-module verification
A method, computer program, signal transmission and apparatus for trusted verification of instructions in a module of a computer program first determine whether...
US-6,618,845 Verifying on-chip decoupling capacitance
A method for verifying on-chip decoupling capacitance by formulating and solving a linear problem. Further, a software tool for determining decoupling...
US-6,618,805 System and method for simplifying and managing complex transactions in a distributed high-availability computer...
A method and system that manage upgrades in a high-availability computer system by viewing the upgrade process as driving the system between a succession of...
US-6,618,804 System and method for rearranging bits of a data word in accordance with a mask using sorting
A system is disclosed for rearranging data units of a data word in accordance with a mask word, the mask word having a plurality of mask bits each associated...
US-6,618,799 Selective address translation in coherent memory replication
A multiprocessing computer system employs local and global address spaces and multiple access modes. A portion of the global memory of the multiprocessing...
US-6,618,792 Method and apparatus for locating data in computer systems
Improved techniques for providing users and application programs with access to data stored in computer systems are disclosed. The improved techniques are...
US-6,618,769 Module-by-module verification
A method, computer program, signal transmission and apparatus pre-verify instructions in a module of a computer program one module-at-a-time. First it is...
US-6,618,767 Mechanism by which devices on unforeseen platform variants may be supported without re-release of core platform...
The present invention provides a means to support new and modified platforms without the need to modify the system software kernel. The invention uses an...
US-6,618,754 System for transmission of embedded applications over a network
A system and method for transmitting embedded applications over a network is disclosed, wherein a user of a computer-controlled network client, such as a remote...
US-6,618,724 Human-natural string compare for filesystems
A method for searching a computer directory database is disclosed. The method compares a first and second filename strings, the comparing operating in reverse...
US-6,618,685 Non-invasive testing of smart cards
A system and method is provided for non-invasive testing of smart cards. In a preferred embodiment, a host computer is connected to a controller, which is then...
US-6,618,307 Dynamic DRAM sense amplifier
A dynamic sense amplifier is provided that reduces the amount of time required to perform a memory cell restoration in a DRAM following a read operation. The...
US-6,618,277 Apparatus for reducing the supply noise near large clock drivers
An apparatus for reducing power supply noise in the power supply system of a clock driver has been developed. The apparatus includes a clock driver with a power...
US-6,618,262 Circuit board retaining brackets
A mother board retaining bracket is mounted to an outer circuit board housing and supports an edge of a mother board. The mother board retaining bracket prevents...
US-6,618,260 Removable expansion card cage
An expansion enclosure allows additional expansion cards to be used with a computer system. The enclosure exhibits a small footprint (e.g., one rack unit, or...
US-6,618,054 Dynamic depth-of-field emulation based on eye-tracking
A graphics system comprising a rendering engine, a sample buffer and a filtering engine. The rendering engine receives graphics primitives, generates sample...
US-6,617,882 Clocked half-rail differential logic
Clocked half-rail differential logic circuits are activated by a delayed clock. According to the invention, when clocked half-rail differential logic circuits of...
US-6,617,841 Method and apparatus for characterization of electronic circuitry
The present invention is a method and apparatus for characterization of electronic circuitry. Electronic systems rely on correct circuitry to function properly....
US-6,617,699 120 degree bump placement layout for an integrated circuit power grid
A 120 degree bump placement layout for an integrated circuit power grid is provided. This layout improves integrated circuit performance and reliability and...
US-6,617,685 Clip heat sink assembly
A heat sink assembly includes a retainer having a body, a finger extending from the body and legs extending from the body. The assembly further includes a heat...
US-6,615,409 Tinted plastic lens for eye protecting devices
A goggle has a replaceable plastic lens mounted in a flexible frame containing several air vents for passing external air through the goggle interior. The lens...
US-6,615,383 System and method for message transmission between network nodes connected by parallel links
A first computer sends a sequence of messages to a second computer using remote write operations to directly store each message in a corresponding memory...
US-6,615,343 Mechanism for delivering precise exceptions in an out-of-order processor with speculative execution
A method of handling an exception in a processor includes setting a state upon detection of an exception, signaling a trap for the exception if the state is set,...
US-6,615,342 Method and apparatus for object-oriented interrupt system
An object-oriented interrupt processing system in a computer system creates a system database including a device namespace containing an entry for each device in...
US-6,615,338 Clustered architecture in a VLIW processor
A Very Long Instruction Word (VLIW) processor has a clustered architecture including a plurality of independent functional units and a multi-ported register file...
US-6,615,264 Method and apparatus for remotely administered authentication and access control
Authentication and session management can be used with a system architecture that partitions functionality between a human interface device (HID) and a...
US-6,615,218 Database for executing policies for controlling devices on a network
A database that can store static and dynamic entries, wherein a static entry contains conventional static data, and a dynamic entry contains information...
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