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Patent # Description
US-6,629,205 System and method for increasing the snoop bandwidth to cache tags in a cache memory subsystem
A cache memory includes a plurality of memory chips, or other separately addressable memory sections, which are configured to collectively store a plurality of...
US-6,629,198 Data storage system and method employing a write-ahead hash log
A data storage system includes a computer coupled to a non-volatile storage, such as a disk drive. The computer includes a block cache for storing cached copies...
US-6,629,154 Method and system for deterministic hashes to identify remote methods
A method and system is provided to uniquely identify a remote method to invoke on a server using a hash value computed from the method signature sent from the...
US-6,629,142 Mechanism for optimizing processing of client requests
An improved mechanism for processing client requests is disclosed. The first time a client request for a particular resource is received by a server, it is...
US-6,629,120 Method and apparatus for performing a mask-driven interval multiplication operation
One embodiment of the present invention provides a system that facilitates performing a mask-driven multiplication operation between arithmetic intervals within...
US-6,628,786 Distributed state random number generator and method for utilizing same
A system and method for generating random numbers utilizing a shared or distributed source of entropy is disclosed. In one embodiment, the invention allows...
US-6,628,277 Decompression of three-dimensional graphics data using mesh buffer references to reduce redundancy of processing
A graphics system and method for reducing redundant transformation calculations and lighting calculations performed on vertices that are shared by more than one...
US-6,628,273 Method and apparatus for selective enabling of addressable display elements
A method and apparatus for driving a plurality of addressable elements consist of driving and selectively enabling one or more addressable elements arranged as...
US-6,628,138 Increasing decoupling capacitance using preferential shields
An integrated circuit that preferentially shields a signal to increase decoupling capacitance is provided. The signal is preferentially shielded based on a...
US-6,628,135 Analog-based on-chip voltage sensor
An on-chip voltage sensor that selectively eliminates noise from a voltage measurement is provided. The on-chip voltage sensor has resistive and capacitive...
US-6,627,812 Apparatus for containing electro-magnetic interference
The present invention discloses methods and apparatus for installing printed circuit boards within an electronic assembly. One embodiment of the present...
US-6,627,201 Composition for drinking/eating and beverage/food
The composition for beverages/food of the present invention is a mixture of the AGARICUS BLAZEI MURRILL fruiting body and mycelium extract in a ratio by dry...
US-6,626,201 Apparatus for preventing reverse flow in drainage
An apparatus for preventing reverse flows in a drainage is disclosed. In this apparatus, a floating device (41) and a reverse flow preventing device (54) act...
US-6,625,970 Method of making twisted elongated yarn
An article of furniture is made from elongated polymer filaments which are attached and woven onto a frame forming woven panels. Subsequent to the weaving and...
US-D480,018 Sculpture
US-D480,017 Sculpture
US-D480,016 Sculpture
US-6,625,805 Dynamic byte code examination to detect whether a GUI component handles mouse events
Broadly speaking, the present invention provides apparatus and methods for determining whether a byte code formatted computer program handles pointer device...
US-6,625,791 Sliding grid based technique for optimal on-chip decap insertion
A method and apparatus for optimizing the insertion of decoupling capacitance onto an integrated circuit is provided. Further, a sliding grid based technique for...
US-6,625,751 Software fault tolerant computer system
A software fault tolerant computer system includes a primary virtual machine and a secondary virtual machine. The secondary virtual machine is operable to...
US-6,625,700 Arbitration and select logic for accessing a shared memory
A technique for arbitrating and selecting one access request to a shared memory from among multiple contenders is disclosed. In a first aspect, the invention...
US-6,625,641 Method and apparatus for providing client support without installation of server software
A method and apparatus for supporting a pure client. In an embodiment of the invention, a client process is executing on a local host machine, whereas server...
US-6,625,634 Efficient implementation of multiprecision arithmetic
The present invention provides an efficient implementation of multiprecision arithmetic, such as for a microprocessor. In one embodiment, a method includes...
US-6,625,307 Image decode optimization techniques
In general, a method and apparatus for decoding an encoded digital image is disclosed. An image decoder receives an encoded digital image and determines if the...
US-6,625,206 Simultaneous bidirectional data transmission system and method
A digital communication system is presented implementing a data transmission method which allows each of a pair of communication devices coupled to a...
US-6,624,824 Tilt-scrolling on the sunpad
Scrolling techniques for computing devices are disclosed which respond to the amount of tilt, measured against a reference, experienced by a control unit. The...
US-6,624,823 Graphics system configured to determine triangle orientation by octant identification and slope comparison
A graphics system comprises a rendering unit, a sample buffer, and a sample-to-pixel calculation unit. The rendering unit receives vertices defining a triangle,...
US-6,624,687 Method and structure for supply gated electronic components
A method and structure for supply gating low power electronic components uses low threshold gating transistors. The low power components operate at supply...
US-6,624,664 Clocked full-rail differential logic with sense amplifiers
Modified full-rail differential logic circuits are activated by a delayed clock and include a sense amplifier circuit that is triggered by a second delayed...
US-6,624,240 Low molecular weight polyurethane resins
Disclosed is a polyurethane resin having a number average molecular weight of up to 5,000 which is prepared by reacting a diisocyanate compound with at least one...
US-6,622,242 System and method for performing generalized operations in connection with bits units of a data word
A functional unit is described for selectively performing a number of types of bit rearrangement operations, including a generalized bit reverse operation and a...
US-6,622,231 Method and apparatus for paging data and attributes including an atomic attribute
A digital data processing apparatus configured to selectively transfer data between a primary data storage element and an associated data file on a secondary...
US-6,622,219 Shared write buffer for use by multiple processor units
A shared write back buffer for storing data from a data cache to be written back to memory. The shared write back buffer includes a plurality of ports, each port...
US-6,622,193 Method and apparatus for synchronizing interrupts in a message passing queue oriented bus system
In a message-passing, queue-oriented bus system, a separate interrupt work queue assigned to each interrupt line for each PCI device sends interrupt information...
US-6,622,155 Distributed monitor concurrency control
A system and method is disclosed for synchronizing threads of execution within a distributed computing environment. Threads of execution within a computer spawn...
US-6,621,711 Enclosure for electronics assembly
An enclosure for an electronics assembly, comprises (i) a housing (1) having a recess (36); and (ii) a module (40) for holding one or more components of the...
US-6,621,709 Electronics assembly
An electronics assembly comprises: (i) a frame (1); and (ii) a motherboard (16) that is removable from the frame. One or more motherboards (20) extend in a plane...
US-6,621,708 Electronics assembly including a protective shield
An electronics assembly comprises: (i) a frame (1); (ii) a motherboard (16) that is located within the frame; and (iii) one or more daughterboards (20) that...
US-6,621,472 Low cost virtual reality system
Apparatus is disclosed for viewing computer generated images and for tracking the positions of the user's head and hand. One alternative of the apparatus...
US-6,621,427 Method and apparatus for implementing a doubly balanced code
One embodiment of the present invention provides a system for encoding a dataword into a current codeword within a stream of codewords, wherein each codeword in...
US-6,621,318 Low voltage latch with uniform sizing
Low voltage latches are designed such that all the transistors included in the latch are low threshold transistors and the low threshold transistors have the...
US-6,620,750 Dielectric ceramic composition and method for manufacturing multilayered components using the same
The present invention discloses dielectric ceramic compositions having dielectric properties suitable for high frequency bands, such as microwave and millimetric...
US-6,619,858 Optical interconnect
An optical interconnect is provided that optically connects two adjacent printed circuit boards, or electrical component. The optical interconnect includes a...
US-6,618,855 Caching untrusted modules for module-by-module verification
A method, computer program, signal transmission and apparatus for trusted verification of instructions in a module of a computer program first determine whether...
US-6,618,845 Verifying on-chip decoupling capacitance
A method for verifying on-chip decoupling capacitance by formulating and solving a linear problem. Further, a software tool for determining decoupling...
US-6,618,805 System and method for simplifying and managing complex transactions in a distributed high-availability computer...
A method and system that manage upgrades in a high-availability computer system by viewing the upgrade process as driving the system between a succession of...
US-6,618,804 System and method for rearranging bits of a data word in accordance with a mask using sorting
A system is disclosed for rearranging data units of a data word in accordance with a mask word, the mask word having a plurality of mask bits each associated...
US-6,618,799 Selective address translation in coherent memory replication
A multiprocessing computer system employs local and global address spaces and multiple access modes. A portion of the global memory of the multiprocessing...
US-6,618,792 Method and apparatus for locating data in computer systems
Improved techniques for providing users and application programs with access to data stored in computer systems are disclosed. The improved techniques are...
US-6,618,769 Module-by-module verification
A method, computer program, signal transmission and apparatus pre-verify instructions in a module of a computer program one module-at-a-time. First it is...
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