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Patent # Description
US-6,711,646 Dual mode (registered/unbuffered) memory interface
A dual mode memory interface includes a bus switch and a register/buffer operatively coupled to the bus switch. The dual mode memory interface may include,...
US-6,711,576 Method and apparatus for implementing compact type signatures in a virtual machine environment
Methods and apparatus for creating compacted method signatures from method signature representations in Java.TM. class files are disclosed. The use of compacted...
US-6,711,419 Integrated information appliance
An integrated information appliance includes a central processing unit for executing an action in response to a user request, a storage for storing information...
US-6,710,753 Multi-screen session mobility between terminal groups
The present invention is for multi-screen session mobility between terminal groups. The invention uses a set of screen groups and a set of terminal groups to...
US-6,710,436 Method and apparatus for electrostatically aligning integrated circuits
One embodiment of the present invention provides a system that uses electrostatic forces to align semiconductor chips relative to each other. The system operates...
US-6,709,503 Waterbased heatset offset ink compositions
A waterbased heatset offset lithographic ink comprising water, polyamide resins or fumarated rosin resins, hydroxyethylethylene urea, a modified linseed oil, a...
US-6,708,372 Snap-in fan tray ejector and handle
A handle for ejecting a fan tray from an electronics enclosure comprises an elongated lever arm and a pair of opposing spring tabs extending from the lever arm...
US-6,708,340 Apparatus and method relating to a quick attachment and release goggle mounting system
System and methods for mounting a goggle to a helmet. The systems comprising a retaining post. The retaining post has a distal portion that has a portion with a...
US-6,708,314 Clock skew reduction using active shields
A technique that uses active shields to reduce clock skew is provided. The technique uses a shield wire for shielding the signal wire, a driver stage for driving...
US-6,708,310 Method and system for implementing user-defined codeset conversions in a computer system
A method and system for performing user-defined code conversions in a computer system. A utility accepts a text file from a user program. This text file contains...
US-6,708,238 Input/output cell with a programmable delay element
An IO cell for providing a transmission path for a binary signal. The IO cell includes an IO buffer for amplifying the binary signal. A programmable delay...
US-6,708,171 Network proxy
A network proxy is provided that facilitates the integration of orphan services into a network by enabling them to interact with a lookup service that contains...
US-6,707,721 Low power memory design with asymmetric bit line driver
A register file design having an asymmetric bit line driver is provided. More specifically, the register file design uses a memory element that has a footer...
US-6,707,477 Method and apparatus for executing and displaying output of an environment in a host environment
An environment is emulated in a host environment. Output generated in the emulated environment is displayed in a window of the host environment. The emulated...
US-6,707,320 Clock detect indicator
A clock detect indicator capable of determining the presence of high and low frequency clock signals is provided. The clock detect indicator, which operates...
US-6,707,317 Method and apparatus for asynchronously controlling domino logic gates
One embodiment of the present invention provides a domino logic circuit that operates asynchronously. This domino logic circuit includes a number of stages,...
US-6,706,777 Water compatible energy curable compositions containing maleimide derivatives
Active water compatible energy curable compositions comprised of maleimide derivatives, water compatible resins and water which are capable of curing at a...
US-6,705,070 Method of making furniture with synthetic woven material
An article of furniture is made from elongated polymer filaments. The polymer filaments may be monofilaments or plural filaments which are twisted together and...
US-6,704,927 Static binding of dynamically-dispatched calls in the presence of dynamic linking and loading
Techniques for performing static binding of dispatched-calls in the presence of dynamic linking and loading are provided. A method for increasing the execution...
US-6,704,923 System and method for pre-verification of stack usage in bytecode program loops
The present invention provides a verifier for use in conjunction with programs utilizing data type specific bytecodes for verifying the proper operation of the...
US-6,704,911 RC netlist reduction for timing and noise analysis
A circuit reduction method that generates a netlist that maintains a topology of an original circuit while preserving an original circuit's functions and...
US-6,704,876 Microprocessor speed control mechanism using power dissipation estimation based on the instruction data path
A power dissipation control mechanism for a central processing unit includes a power estimation circuit for estimating the power dissipation of instructions...
US-6,704,862 Method and apparatus for facilitating exception handling using a conditional trap instruction
One embodiment of the present invention provides a system that supports exception handling through use of a conditional trap instruction. The system supports a...
US-6,704,841 Method and apparatus for facilitating speculative stores in a multiprocessor system
One embodiment of the present invention provides a system for facilitating speculative store operations in a multiprocessor system. This system operates by...
US-6,704,831 Method and apparatus for converting address information between PCI bus protocol and a message-passing...
PCI load/store operations and DMA operations are implemented via work queue pairs in a message-passing, queue-oriented bus architecture. PCI address space is...
US-6,704,827 Hot plug interface (HPI) test fixture
A method is provided, the method comprising testing at least one hot-pluggable peripheral hardware device and a computer system by simulating hot-plugging the at...
US-6,704,822 Arbitration protocol for a shared data cache
A method and computer system for resolving simultaneous requests from multiple processing units to load from or store to the same shared resource. When the...
US-6,704,816 Method and apparatus for executing standard functions in a computer system using a field programmable gate array
A computer system comprising mass storage, a system bus connected to the mass storage, and a processor unit connected to the system bus. A library of standard...
US-6,704,786 Network and end-host efficiency for web communication
Network and host efficiencies are improved by reducing the overhead associated with establishing virtual circuits. In one approach, a request for information...
US-6,704,756 Methods, apparatus, and product for distributed garbage collection
In accordance with the present invention a process is provided for allocating and deallocating resources in a distributed processing system having a requester...
US-6,704,746 Method and apparatus for lazy instantiation of objects in a virtual machine
One embodiment of the present invention provides a system for creating objects in a virtual machine. The system operates by receiving a request to create an...
US-6,704,680 Method for decoupling capacitor optimization for a temperature sensor design
A method for optimizing a decoupling capacitance for an on-chip temperature sensor is provided. A representative power supply waveform having noise is input into...
US-6,704,677 Method and apparatus for generating a data pattern for simultaneously testing multiple bus widths
One embodiment of the present invention provides a system that facilitates generating a bus testing data pattern for simultaneously testing multiple bus widths....
US-6,704,026 Graphics fragment merging for improving pixel write bandwidth
A merge unit for the merging of tiles or arrays of pixels or samples, and suitable for use in a high performance graphics system is described. The unit may...
US-6,703,949 Method and apparatus for facilitating balanced bundles of electrical signals
One embodiment of the present invention provides a system that transmits a stream of datawords through a bundle of conductors with a three-dimensional structure....
US-6,703,867 Clocked full-rail differential logic with sense amplifier and shut-off
Clocked full-rail differential logic circuits with sense amplifier and shut-off are activated by a delayed clock and include a sense amplifier circuit that is...
US-6,702,228 Film reel
Motion picture film reel for holding, transporting and storing film comprising a pair of disc-shaped side retaining members and a central hub around which the...
US-6,701,498 Black box timing model for latch-based systems
A method of creating a black box timing model for a digital circuit. The digital circuit is characterized by a block model having at least one input and at least...
US-6,701,488 Reducing I/O supply noise with digital control
A method for reducing noise in an I/O system has been developed. The method includes powering up the I/O supply and activating or inserting a shunting resistance...
US-6,701,460 Method and apparatus for testing a computer system through software fault injection
One embodiment of the present invention provides a system for testing a computer system by using software to inject faults into the computer system while the...
US-6,701,438 Methods and apparatus for providing customizable security and logging protocols in a servlet engine
Methods and apparatus for providing customized security and logging protocols in a servlet environment are described. A servlet engine that includes a security...
US-6,701,417 Method and apparatus for supporting multiple cache line invalidations per cycle
One embodiment of the present invention provides a multiprocessor system that supports multiple cache line invalidations within the same cycle. This...
US-6,701,412 Method and apparatus for performing software sampling on a microprocessor cache
One embodiment of the present invention provides a system that facilitates sampling a cache in a computer system, wherein the computer system has multiple...
US-6,701,374 Method and apparatus for dynamic proxy insertion in network traffic flow
In embodiments of the invention, a method and apparatus for dynamic proxy insertion in network traffic path is described. According to one or more embodiments of...
US-6,701,367 Mechanism for enabling customized session managers to interact with a network server
A mechanism for enabling customized session managers to interact with a network server is disclosed. The mechanism includes a programming interface which enables...
US-6,701,334 Methods and apparatus for implementing individual class loaders
Methods and apparatus for loading and unloading classes associated with an application are disclosed. A class loader adapted for loading classes associated with...
US-6,700,946 System and method for automatic generation of an at-speed counter
Methods and systems for automatic generation of an at-speed binary counter are described. The binary counter includes a slow counter that increments when a fast...
US-6,700,825 Implementation of a multi-dimensional, low latency, first-in first-out (FIFO) buffer
A novel FIFO data structure in the form of a multi-dimensional FIFO. For a rectangular multi-dimensional FIFO, data items are received at an input of an...
US-6,700,421 Method and apparatus for reducing power consumption
A phase locked loop circuit is provided. The phase locked loop circuit is comprised of a first and second divide-by-N counter, a phase comparator, a voltage...
US-6,700,418 Output driver having dynamic impedance control
Disclosed is an input/output (IO) device for transmitting a data bit signal. In one embodiment, the IO device includes an IO device input node for receiving an...
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