Easy To Use Patents Search & Patent Lawyer Directory

At Patents you can conduct a Patent Search, File a Patent Application, find a Patent Attorney, or search available technology through our Patent Exchange. Patents are available using simple keyword or date criteria. If you are looking to hire a patent attorney, you've come to the right place. Protect your idea and hire a patent lawyer.

Searching: sun





Search by keyword, patent number, inventor, assignee, city or state:




Patent # Description
US-6,727,717 Integrated circuit chip test adapter
An apparatus for testing an integrated circuit chip includes a printed circuit device having connector pads, contacts, and traces extending between at least some...
US-6,727,295 Energy curable gravure inks incorporating grafted pigments
Solvent-free, energy curable low viscosity gravure and non-conductive ink jet inks which contain a pigment; a rheological additive having the structure...
US-6,727,193 Apparatus and methods for enhancing thermal performance of integrated circuit packages
Novel methods and apparatus to enhance thermal performance of IC packages are disclosed. In an embodiment, a method of enhancing thermal uniformity across a...
US-6,725,640 Method of making furniture with synthetic woven material
An article of furniture is made from elongated polymer filaments. The polymer filaments may be monofilaments or plural filaments which are twisted together and...
US-6,725,363 Method for filtering instructions to get more precise event counts
This invention provides for filtering instructions to obtain more precise event counts with a plurality of instructions having a counter enable bit, executing...
US-6,725,347 Spin-wheel SDRAM access scheduler for high performance microprocessors
A memory control unit has been developed. The control unit includes a command "spin wheel" which schedules the order of read and write commands to the memory. It...
US-6,725,338 Method and apparatus for preventing cache pollution in microprocessors with speculative address loads
A method of optimizing speculative address load processing by a microprocessor includes identifying a speculative load, marking the speculative load, determining...
US-6,725,336 Dynamically allocated cache memory for a multi-processor unit
The resources of a partitioned cache memory are dynamically allocated between two or more processors on a multi-processor unit (MPU). In one embodiment, the MPU...
US-6,725,314 Multi-bank memory subsystem employing an arrangement of multiple memory modules
A multi-bank memory subsystem employing multiple memory modules. A memory subsystem includes a memory controller coupled to a memory bus. The memory bus includes...
US-6,725,308 Locking of computer resources
A computer processor includes a number of register pairs LOCKADD/LOCKCOUNT to hold values identifying when a computer resource is locked. The LOCKCOUNT register...
US-6,725,280 Method and apparatus for constructing dispatch tables which enable transitive method override
A mechanism is disclosed for constructing dispatch tables which enable transitive method override. A dispatch table for a class C (wherein C is within a package...
US-6,725,244 Method and system for allocation of file descriptors
Improved techniques for allocating file descriptors are disclosed. According to one aspect, the file descriptors are stored in a tree-like data structure. The...
US-6,725,015 Wireless network access facility
A wireless network access facility includes one or more IEEE frequency devices, one or more multi-function actuating devices, and a processor device which...
US-6,724,896 Event-driven servers for data extraction and merge for EDI transaction processing using the internet
A method and apparatus for performing event-driven data transfer operations over a global computer network. Electronic Data Interchange (EDI) format data is...
US-6,724,733 Method and apparatus for determining approximate network distances using reference locations
The invention is a method and apparatus for determining an approximate network distance using one or more reference points. In accordance with an embodiment of...
US-6,724,152 Lighting control system with variable arc control including start-up circuit for providing a bias voltage supply
A lighting control system provides variable arc current to one or more fluorescent gas discharge lamps and provides a heating voltage to the lamp electrodes. The...
US-6,723,962 Double deck toaster oven
An oven having a cooking chamber which has a pair of opposing sidewalls and a rear wall member having a pair of end portions and a protruding portion between the...
US-6,723,915 Emi-shielding riser card for a computer chassis
An EMI-shielding riser card for reducing electromagnetic radiation from a computer enclosure is disclosed. The EMI-shielding riser card is a six-layer riser card...
US-6,723,820 Solvent soluble poly(urethane/urea) resins
Solvent based poly(urethane/urea) resins suitable for formulating flexographic and gravure laminating printing ink and coating compositions formed from a...
US-6,723,157 Material for capturing chemical substance, method for producing the same, and chemical substance-capturing tube
A material is provided for capturing a chemical substance comprising fibers which carry metal alkoxide particles on the surfaces thereof. The metal alkoxide...
US-6,722,971 Fan carrier, computer system and method of installing and removing a fan in a computer system
A fan carrier defines one or more enclosures with each enclosure receiving a fan unit. A first wall of the carrier includes at least one air vent that can be...
US-D488,898 Window scraper
US-6,721,944 Marking memory elements based upon usage of accessed information during speculative execution
One embodiment of the present invention provides a system that marks memory elements based upon how information retrieved from the memory elements affects...
US-6,721,936 Shield assignment using preferential shields
A method for preferentially shielding a signal to increase implicit decoupling capacitance is provided. The signal is preferentially shielded by using a...
US-6,721,888 Mechanism for merging multiple policies
A mechanism for merging multiple source policies to derive a resultant policy is disclosed. The source policies, which may represent sets of laws/regulations,...
US-6,721,864 Programmable memory controller
A synchronous dynamic random access memory controller has a high speed interface and a low speed interface. The high speed interface has a buffer with entries...
US-6,721,855 Using an L2 directory to facilitate speculative loads in a multiprocessor system
One embodiment of the present invention provides a system that facilitates speculative load operations in a multiprocessor system. This system operates by...
US-6,721,852 Computer system employing multiple board sets and coherence schemes
The present invention provides a method and apparatus for updating a directory cache. The method comprises detecting a memory access transaction, determining a...
US-6,721,789 Scheduling storage accesses for rate-guaranteed and non-rate-guaranteed requests
A system for managing storage accesses for rate guaranteed continuous multimedia data streams and non-rate-guaranteed storage requests may include a plurality of...
US-6,721,777 Modular and portable deployment of a resource adapter in an application server
A system by which resource adapters may be utilized in client server computer configurations utilizing enterprise information systems is disclosed. A connector...
US-6,721,771 Method for efficient modular polynomial division in finite fields f(2 m)
The present invention provides a method for performing an inversion and multiply in a single operation as a polynomial divide operation. As a result, the...
US-6,721,740 Method and apparatus of performing active update notification
A method and apparatus of performing active update notification. Components of an application are able to specify interest in a data object or set of data...
US-6,721,317 Switch-based scalable performance computer memory architecture
Several embodiments of a computer system are described which achieve separation of control and data paths during data transfer operations, thus allowing...
US-6,721,185 Memory module having balanced data I/O contacts pads
A memory module having balanced data input/output contacts. A memory module includes a printed circuit board having an edge connector and a plurality of memory...
US-6,720,969 Dirty tag bits for 3D-RAM SRAM
An external cache management unit for use with a 3D-RAM frame buffer and suitable for use in a computer graphics system is described. The unit may reduce power...
US-6,720,813 Dual edge-triggered flip-flop design with asynchronous programmable reset
A dual edge-triggered flip-flop that may be programmably reset independent of a clock signal is provided. Using an externally generated reset value, the dual...
US-6,720,774 Interchangeable fan control board with fault detection
A control board controls operation of a plurality of ventilation fans and generates a fault signal upon occurrence of a predetermined fault condition. The...
US-6,720,331 1-substituted 1,2,3,4-tetrahydro-.beta.-carboline and 3,4-dihydro-.beta.-carboline and analogs as antitumor agents
A composition includes a substituted dihydro- or tetrahydro-.beta.-carboline of formula (II) or (III), wherein the aromatic ring of the carboline may include one...
US-6,718,839 Method and apparatus for facilitating speculative loads in a multiprocessor system
One embodiment of the present invention provides a system that facilitates speculative load operations in a multiprocessor system. The system operates by...
US-6,718,550 Method and apparatus for improving the performance of object invocation
Data structures, methods and devices for reducing computing overhead by utilizing different invocation paths for same process and different process invocations...
US-6,718,542 Disambiguating memory references based upon user-specified programming constraints
A system that allows a programmer to specify a set of constraints that the programmer has adhered to in writing code so that a compiler is able to assume the set...
US-6,718,538 Method and apparatus for hybrid checkpointing
The present invention provides a method and apparatus for hybrid checkpointing which captures the entire address space of a process: both language internal and...
US-6,718,530 Method and apparatus for analyzing inductive effects in a circuit layout
One embodiment of the present invention provides a system that considers inductive effects while analyzing noise and propagation delay effect in a circuit...
US-6,718,527 Automated design rule violation correction when adding dummy geometries to a design layout
Automated techniques to correct certain rule violations with respect to non-design geometries are used, simplifying and automating the design layout of an...
US-6,718,492 System and method for arranging bits of a data word in accordance with a mask
A system is disclosed for providing, from an input data word comprising a plurality of input data units having an input arrangement and a mask word comprising a...
US-6,718,473 Method and apparatus for reducing power consumption
In one aspect of the present invention, a method for controlling the operation of a phase locked loop circuit is provided. The method is comprised of monitoring...
US-6,718,472 System for suspending power to a field replaceable unit upon receiving fault signal and automatically...
A power sub-system controls a supply of power to a field replaceable unit for electronic equipment. The power sub-system includes a power controller that is...
US-6,718,460 Mechanism for error handling in a computer system
In one aspect, a method for managing program flow in a computer system having a processor having a prefetch mechanism and an instruction pipeline includes...
US-6,718,457 Multiple-thread processor for threaded software applications
A processor has an improved architecture for multiple-thread operation on the basis of a highly parallel structure including multiple independent parallel...
US-6,718,456 Parallel pack instruction method and apparatus
Disclosed herein is a apparatus and method for packing a 16-bit number into an 8-bit result byte. The method and apparatus utilize a parallel processing right...
← Previous | 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 | Next →

File A Patent Application

  • Protect your idea -- Don't let someone else file first. Learn more.

  • 3 Easy Steps -- Complete Form, application Review, and File. See our process.

  • Attorney Review -- Have your application reviewed by a Patent Attorney. See what's included.