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Patent # Description
US-6,722,971 Fan carrier, computer system and method of installing and removing a fan in a computer system
A fan carrier defines one or more enclosures with each enclosure receiving a fan unit. A first wall of the carrier includes at least one air vent that can be...
US-D488,898 Window scraper
US-6,721,944 Marking memory elements based upon usage of accessed information during speculative execution
One embodiment of the present invention provides a system that marks memory elements based upon how information retrieved from the memory elements affects...
US-6,721,936 Shield assignment using preferential shields
A method for preferentially shielding a signal to increase implicit decoupling capacitance is provided. The signal is preferentially shielded by using a...
US-6,721,888 Mechanism for merging multiple policies
A mechanism for merging multiple source policies to derive a resultant policy is disclosed. The source policies, which may represent sets of laws/regulations,...
US-6,721,864 Programmable memory controller
A synchronous dynamic random access memory controller has a high speed interface and a low speed interface. The high speed interface has a buffer with entries...
US-6,721,855 Using an L2 directory to facilitate speculative loads in a multiprocessor system
One embodiment of the present invention provides a system that facilitates speculative load operations in a multiprocessor system. This system operates by...
US-6,721,852 Computer system employing multiple board sets and coherence schemes
The present invention provides a method and apparatus for updating a directory cache. The method comprises detecting a memory access transaction, determining a...
US-6,721,789 Scheduling storage accesses for rate-guaranteed and non-rate-guaranteed requests
A system for managing storage accesses for rate guaranteed continuous multimedia data streams and non-rate-guaranteed storage requests may include a plurality of...
US-6,721,777 Modular and portable deployment of a resource adapter in an application server
A system by which resource adapters may be utilized in client server computer configurations utilizing enterprise information systems is disclosed. A connector...
US-6,721,771 Method for efficient modular polynomial division in finite fields f(2 m)
The present invention provides a method for performing an inversion and multiply in a single operation as a polynomial divide operation. As a result, the...
US-6,721,740 Method and apparatus of performing active update notification
A method and apparatus of performing active update notification. Components of an application are able to specify interest in a data object or set of data...
US-6,721,317 Switch-based scalable performance computer memory architecture
Several embodiments of a computer system are described which achieve separation of control and data paths during data transfer operations, thus allowing...
US-6,721,185 Memory module having balanced data I/O contacts pads
A memory module having balanced data input/output contacts. A memory module includes a printed circuit board having an edge connector and a plurality of memory...
US-6,720,969 Dirty tag bits for 3D-RAM SRAM
An external cache management unit for use with a 3D-RAM frame buffer and suitable for use in a computer graphics system is described. The unit may reduce power...
US-6,720,813 Dual edge-triggered flip-flop design with asynchronous programmable reset
A dual edge-triggered flip-flop that may be programmably reset independent of a clock signal is provided. Using an externally generated reset value, the dual...
US-6,720,774 Interchangeable fan control board with fault detection
A control board controls operation of a plurality of ventilation fans and generates a fault signal upon occurrence of a predetermined fault condition. The...
US-6,720,331 1-substituted 1,2,3,4-tetrahydro-.beta.-carboline and 3,4-dihydro-.beta.-carboline and analogs as antitumor agents
A composition includes a substituted dihydro- or tetrahydro-.beta.-carboline of formula (II) or (III), wherein the aromatic ring of the carboline may include one...
US-6,718,839 Method and apparatus for facilitating speculative loads in a multiprocessor system
One embodiment of the present invention provides a system that facilitates speculative load operations in a multiprocessor system. The system operates by...
US-6,718,550 Method and apparatus for improving the performance of object invocation
Data structures, methods and devices for reducing computing overhead by utilizing different invocation paths for same process and different process invocations...
US-6,718,542 Disambiguating memory references based upon user-specified programming constraints
A system that allows a programmer to specify a set of constraints that the programmer has adhered to in writing code so that a compiler is able to assume the set...
US-6,718,538 Method and apparatus for hybrid checkpointing
The present invention provides a method and apparatus for hybrid checkpointing which captures the entire address space of a process: both language internal and...
US-6,718,530 Method and apparatus for analyzing inductive effects in a circuit layout
One embodiment of the present invention provides a system that considers inductive effects while analyzing noise and propagation delay effect in a circuit...
US-6,718,527 Automated design rule violation correction when adding dummy geometries to a design layout
Automated techniques to correct certain rule violations with respect to non-design geometries are used, simplifying and automating the design layout of an...
US-6,718,492 System and method for arranging bits of a data word in accordance with a mask
A system is disclosed for providing, from an input data word comprising a plurality of input data units having an input arrangement and a mask word comprising a...
US-6,718,473 Method and apparatus for reducing power consumption
In one aspect of the present invention, a method for controlling the operation of a phase locked loop circuit is provided. The method is comprised of monitoring...
US-6,718,472 System for suspending power to a field replaceable unit upon receiving fault signal and automatically...
A power sub-system controls a supply of power to a field replaceable unit for electronic equipment. The power sub-system includes a power controller that is...
US-6,718,460 Mechanism for error handling in a computer system
In one aspect, a method for managing program flow in a computer system having a processor having a prefetch mechanism and an instruction pipeline includes...
US-6,718,457 Multiple-thread processor for threaded software applications
A processor has an improved architecture for multiple-thread operation on the basis of a highly parallel structure including multiple independent parallel...
US-6,718,456 Parallel pack instruction method and apparatus
Disclosed herein is a apparatus and method for packing a 16-bit number into an 8-bit result byte. The method and apparatus utilize a parallel processing right...
US-6,718,438 Using feedback to determine the size of an object cache
The present invention uses feedback to determine the size of an object cache. The size of the cache, (i.e., its budget), varies and is determined based on...
US-6,718,428 Storage array interconnection fabric using a torus topology
A storage array interconnection fabric may be configured using a torus topology. A storage system including a path-redundant torus interconnection fabric is...
US-6,718,398 Robust communications connection system and method for shared memory
A communications arrangement is described for facilitating transfer of messages among a plurality of processes in a computer system. The communications...
US-6,718,387 Reallocating address spaces of a plurality of servers using a load balancing policy and a multicast channel
A method for load balancing including creating a network, having a plurality of servers, to service a single multicast address using a source specific join,...
US-6,718,383 High availability networking with virtual IP address failover
A method and mechanism, operating within an application layer of the architectural model of a communications protocol, for maintaining high availability in a...
US-6,718,364 Method and apparatus for expedited file downloads in an applet environment
Methods and apparatus for executing an applet are disclosed. A virtual machine that includes a class loader generates a file download request in the form of an...
US-6,718,354 Signal interpolation and decimation exploiting filter symmetry
Symmetry in a filter is used to reduce the complexity of an interpolator or a decimator and to simplify derivation of resulting discrete samples. In particular,...
US-6,718,325 Approximate string matcher for delimited strings
A method for comparing two delimited strings, each of which has a plurality of substrings, includes pairing each substring in one of the delimited string with a...
US-6,717,595 Computer-based list editor
Disclosed is a list editor component for allowing a computer user to arrange a collection of information items. The list editor component displays an editor...
US-6,717,578 Graphics system with a variable-resolution sample buffer
A method and computer graphics system capable of super-sampling and performing real-time convolution are disclosed. In one embodiment, the computer graphics...
US-6,717,438 Clocked half-rail differential logic with single-rail logic
Clocked half-rail differential logic circuits with single-rail logic of the invention do not include complementary logic elements. According to the invention,...
US-6,715,215 Electric hair dryer
There is disclosed an electric hair dryer (10) including a body (12) with a rear end (16) allowing entry of air into the body (12), a front end (18) allowing...
US-D488,153 Computer system
US-6,715,134 Method and apparatus to facilitate generating simulation modules for testing system designs
One embodiment of the present invention provides a system that facilitates generating a simulation module for testing a system design. The system operates by...
US-6,715,066 System and method for arranging bits of a data word in accordance with a mask
A system is described for rearranging data units of a data word in accordance with a mask word, the mask word having a plurality of mask bits each associated...
US-6,714,991 Method and apparatus for implementing fast subclass and subtype checks
Methods and apparatus for performing fast subtype checks during program execution are disclosed. According to one aspect of the present invention, a method for...
US-6,714,612 Method and device for synchronization of phase mismatch in communication systems employing a common clock period
An apparatus to overcome a metastable state in a communication system employing a common clock period includes a first latch and a second latch, the first latch...
US-6,714,433 Memory module with equal driver loading
A memory module comprising a printed circuit board having mounting locations for a plurality of memory chips. A line driver having a plurality of outputs for...
US-6,714,059 High-speed domino logic circuit
An improved high-speed domino logic circuit uses two delayed clock signals, CLKD and CLKDBAR, and three transistors to introduce a transition delay time....
US-6,714,021 Integrated time domain reflectometry (TDR) tester
An integrated TDR for locating transmission line faults. An integrated circuit comprises a transmitter, a path coupled to the transmitter, and a TDR receiver...
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