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Patent # Description
US-6,747,485 Sense amplifier type input receiver with improved clk to Q
A sense amplifier type input receiver includes a differential receiver circuit operatively coupled to an output stage. The output stage includes a pass gate...
US-6,746,502 Electronics assembly with air filter
An electronics assembly includes a chassis and a panel mounted on the chassis. The panel has an air filter on a surface of the panel which is retained in...
US-6,746,155 Bearing device
The present invention relates to a bearing device including a body formed with an inner groove that does not communicate with the shaft hole of the body. Thus,...
US-6,745,387 Method for using a transaction service synchronization interface to perform internal state clean up
A method for using a Synchronization Interface in a computer system compliant with a CORBA Object Transaction Service or a Java Transaction API (such as Java 2...
US-6,745,386 System and method for preloading classes in a data processing device that does not have a virtual memory manager
An authoring system prepares a specified set of classes for preloading in client devices lacking a virtual memory manager. The authoring system converts the...
US-6,745,374 Algorithms for determining path coverages and activity
An apparatus and method are provided for identifying functionally sensitized data paths in a logic circuit and storing the identified data paths in a...
US-6,745,371 Low Vt transistor substitution in a semiconductor device
Performance of an integrated circuit design, whether embodied as a design encoding or as a fabricated integrated circuit, can be improved by selectively...
US-6,745,285 System and method for synchronizing mirrored and striped disk writes
A system and method for synchronizing mirrored and striped disk writes. A data storage system may include a client computer system coupled to a first data...
US-6,745,284 Data storage subsystem including a storage disk array employing dynamic data striping
A data storage subsystem including a storage disk array employing dynamic data striping. A data storage subsystem includes a plurality of storage devices...
US-6,745,213 Method and apparatus to facilitate testing of garbage collection implementations
One embodiment of the present mechanism provides a system to facilitate testing of garbage collection implementations. The system operates by first receiving a...
US-6,744,765 Mechanism for completing messages in memory
A method for transmitting messages between two processes includes creating a communications channel between a first channel adapter coupled to a client process...
US-6,744,641 Electromagnetic interference gasket
An elongate gasket that can be placed on an electrical assembly in order to reduce electromagnetic interference, comprises (i) an elongate deformable strip (1) of...
US-6,744,628 Multi-positionable power distribution unit
A multi-directional power distribution unit (PDU) provides flexibility in the configuration of a computer system, disk drive array or other enclosure. The power...
US-6,744,303 Method and apparatus for tunneling leakage current compensation
A method and apparatus for compensating for tunneling leakage current through a first capacitor includes: an operational amplifier, connected in a negative...
US-6,744,283 Clocked half-rail differential logic with sense amplifier
Clocked half-rail differential logic circuits are activated by a delayed clock and include a sense amplifier circuit that is triggered by a second delayed clock....
US-6,744,172 Heat-dissipating fan
A heat-dissipating fan comprises a rotor and a stator. The rotor includes a ring magnetic mounted to an outer periphery thereof. The stator includes a core. A...
US-6,742,366 Locking and securing system for slot bearing products
By providing a uniquely constructed, dual plate, computer engaging and locking member which is quickly and easily inserted into the receiving slot typically...
US-D490,815 Computer system
US-6,742,123 Apparatus and methods for preventing denial of service attacks
In one aspect of the invention, the frames of a thread stack that associated with the misbehaving code are popped from the thread stack. Exception handling code...
US-6,742,109 Method and apparatus for representing variable-size computer instructions
One embodiment of the present invention provides a system for executing variable-size computer instructions, wherein a variable-size computer instruction...
US-6,742,081 Data storage array employing block checksums and dynamic striping
A storage system may include a plurality of storage devices each having a plurality of addressable locations for storing data. A storage controller may be...
US-6,742,013 Apparatus and method for uniformly performing comparison operations on long word operands
Using a subtraction without borrow operation, the first operand lowest order word is subtracted from a second operand lowest order word. If the result of the...
US-6,742,006 Method and apparatus for selective execution of a computer program
A method and apparatus for ensuring that code being executed by a data processing system conforms to a platform standard. As an example, one embodiment of the...
US-6,741,855 Method and apparatus for remotely managing data via a mobile device
One embodiment of the invention provides a method and apparatus for remotely managing data in a network system comprising at least one mobile device (e.g. a PDA,...
US-6,741,616 Switch fabric for asynchronously transferring data within a circuit
One embodiment of the present invention provides a system that facilitates asynchronously routing data within a circuit. This system includes a data destination...
US-6,741,561 Routing mechanism using intention packets in a hierarchy or networks
A routing scheme using intention packets is contemplated. At times, one or more switching devices within a network may become overloaded with traffic or may...
US-6,741,469 Refrigeration cooling assisted MEMS-based micro-channel cooling system
A refrigeration cooling assisted MEMS-based micro-channel cooling system that removes high heat densities generated by microelectronic components using a primary...
US-6,741,256 Predictive optimizer for DRAM memory
A predictive optimizing unit for use with an interleaved memory and suitable for use in a computer graphics system is described. The unit maintains a queue of...
US-6,741,255 Method, apparatus and computer program product for using deferred execution for a tiling pull model in a tiled...
Apparatus, methods, systems and computer program products are disclosed that optimize the application of deferred image operations on a tiled source image. The...
US-6,741,113 Modified high speed flop design with self adjusting, data selective, evaluation window
Modified high-speed flip-flop include an evaluation window that is self-adjusting and data selective. Consequently, modified high-speed flip-flop circuits...
US-6,741,101 Method for clock control of clocked half-rail differential logic with single-rail logic
Clocked half-rail differential logic circuits with single-rail logic of the invention do not include complementary logic elements. According to the invention,...
US-6,738,969 Non-intrusive gathering of code usage information to facilitate removing unused compiled code
One embodiment of the present invention provides a system that gathers code usage information to facilitate removing compiled code that has not been recently...
US-6,738,959 Method and apparatus for assigning nets to metal layers during circuit routing
One embodiment of the present invention provides a system that facilitates routing nets between cells in a circuit layout. During operation, the system receives...
US-6,738,932 Method and system for identifying software revisions from memory images
A method for identifying software executing on a computer system from a memory image defining at a particular time a state of the executing software. The method...
US-6,738,926 Method and apparatus for recovering a multi-threaded process from a checkpoint
One embodiment of the present invention provides a system for recovering a process that is multi-threaded from checkpoint information that was previously stored...
US-6,738,915 System for supplying multiple voltages to devices on circuit board through a sequencing in a predictable sequence
An apparatus and method for enabling hot swapped circuit boards to receive multiple power voltages from a backplane and supply the multiple power voltages to...
US-6,738,897 Incorporating local branch history when predicting multiple conditional branch outcomes
A method for improving prediction of an outcome for a branch instruction in a set of instructions includes storing local branch history data for the branch...
US-6,738,873 Memory management system supporting deletion of transient objects
One embodiment of the present invention provides a system for compacting memory within a computing device, wherein the computing device supports transient...
US-6,738,846 Cooperative processing of tasks in a multi-threaded computing system
Methods and apparatus for a cooperative processing of a task in a multi-threaded computing system are disclosed. In one aspect of the invention, a first thread...
US-6,738,470 Distributed gateway system for telephone communications
A distributed system of gateways for establishing telephone communication connections between digital telephone service (e.g., DSL) subscribers and analog...
US-6,738,415 Bi-directional communication system
A bi-directional communication system and transceiver configuration are described, which employ a bi-directional reference to account for both common-mode and...
US-6,738,079 Graphical user interface layout customizer
Graphical user interface and computer program products are disclosed for providing a unique user interface that allows a GUI developer significant flexibility...
US-6,738,027 Method and apparatus for configuration using a portable electronic configuration device
The present invention provides a method and apparatus for configuration using a portable electronic configuration device. The portable device is attached to an...
US-6,737,902 Method and a system to distribute clock signals in digital circuits
Provided are a method and a system to distribute clock signals in digital circuits to ensure that the multiple clock signals reach multiple loads associated with...
US-6,737,892 Method and apparatus for detecting valid clock signals at a clock receiver circuit
One embodiment of the present invention provides a system for detecting a valid clock signal at a clock receiver. The system operates by receiving a clock signal...
US-6,737,889 Method for increasing the power efficiency and noise immunity of clocked full-rail differential logic
Clocked full-rail differential logic circuits are provided with shut-off devices. The addition of the shut-off device provides a full-rail differential logic...
US-6,737,844 Dynamic modulation of on-chip supply voltage for low-power design
A modulation circuit arranged to modulate a first voltage from a first power supply grid to produce a desired second voltage not greater than the first voltage...
US-6,737,749 Resistive vias for controlling impedance and terminating I/O signals at the package level
A circuit package and a method of forming the same that facilitates control of the impedance of a driving circuit employing resistive vias formed into a...
US-6,735,770 Method and apparatus for high performance access to data in a message store
A method and apparatus are disclosed for accessing messages in a message store in a multi-threaded system with reduced contention by first determining whether a...
US-6,735,760 Relaxed lock protocol
An object-oriented compiler/interpreter allocates monitor records for use in implementing synchronized operations on objects. When a synchronization operation is...
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