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Patent # Description
US-6,765,571 Using a master controller to manage threads and resources for scene-based rendering
A system and method for rapid processing of scene-graph-based data and/or programs is disclosed. In one embodiment, the system may be configured to utilize a...
US-6,765,415 Clocked full-rail differential logic with shut-off
Clocked full-rail differential logic circuits with shut-off include a shut-off device. The addition of the shut-off device provides a full-rail differential...
US-6,765,410 Method and apparatus for performing a hazard-free multi-bit comparison
An exclusive OR (XOR) circuit is provided to perform a logical XOR function on multiple bits that eliminates the XOR function hazard. The XOR circuit performs a...
US-6,765,040 Publication gravure printing inks based on silicone modified water-based emulsions
The present invention relates an improved silicone modified water-based emulsion used primarily for publication gravure ink. Publication gravure water-based ink...
US-6,764,321 Ground potential only adaptor
There is described a servicing connection for connecting an electrical device to a supply outlet, wherein live and neutral contacts of the supply outlet are...
US-6,763,517 Automated analysis of kernel and user core files including searching, ranking, and recommending patch files
A computerized method for automatically analyzing a core file created by a computer system after an unexpected interrupt. The packages installed on the computer...
US-6,763,512 Detailed method for routing connections using tile expansion techniques and associated methods for designing...
Disclosed herein is a method and associated apparatus for the design and manufacture of VLSI circuit which incorporates therein a method for routing connections...
US-6,763,509 Method and apparatus for allocating decoupling capacitor cells
A method for allocating decoupling capacitor cells in an integrated circuit (IC) design, includes (a) obtaining geometrical information of rectangular areas in...
US-6,763,503 Accurate wire load model
A method for creating a wire load model using specific interconnect configuration information is provided. Further, a program that creates a wire load model by...
US-6,763,502 Method and system for searching a microelectronic device physical layout
Search functions of a physical layout tool are performed by converting a given physical layout name and selected searching layout names from string ...
US-6,763,479 High availability networking with alternate pathing failover
A method and mechanism operating within the Application layer of the architectural model for maintaining high availability in a two node computer network which...
US-6,763,468 Method and apparatus for authenticating users
A method and apparatus for authenticating users. Prior art mechanisms require each individual application (running on an "application server") that the user is...
US-6,763,440 Garbage collection using nursery regions for new objects in a virtual heap
A method and system for garbage collecting a virtual heap using nursery regions for newly created objects to reduce flushing of objects from an in-memory heap to...
US-6,763,397 Fully lazy linking
A method, computer program, signal transmission, apparatus and system for fully lazy verification of instructions in a module of a computer program include first...
US-6,763,382 Method and apparatus for demand based paging algorithm
A method of demand based retrieval of a data file including pages of data, in a network system having a remote host system interconnected to at least one local...
US-6,763,321 Method and apparatus to facilitate measurement of quality-of-service performance of a network server
One embodiment of the present invention provides a system that facilitates measuring quality-of-service of a computer network server or collection of servers by...
US-6,763,133 Moire image capturing apparatus and method therefor
The present invention relates a moire image capturing apparatus and the related method, the apparatus comprising: an optical projection unit arranged in...
US-6,762,961 Variable delay compensation for data-dependent mismatch in characteristic of opposing devices of a sense amplifier
Post-manufacture variation of timing may be employed to address data-dependent degradation or creep in device characteristics affecting a differential circuit....
US-6,762,934 Module ejection mechanism
An ejector mechanism is provided for a field replaceable module (e.g., a server blade) of modular computer system (e.g., a blade server system). The field...
US-6,762,798 Methods and apparatus for providing video control for television applications
Methods and apparatus for creating and manipulating a video window on a display associated with a television are disclosed. A set of parameters identifying a...
US-6,762,760 Graphics system configured to implement fogging based on radial distances
A graphics system configured to implement fogging according to an improved method based on radial distances. The amount of fog applied varies based on a...
US-6,762,623 High-resolution single-ended source-synchronous receiver
Disclosed are novel methods and apparatus for efficiently providing high-resolution single-ended source synchronous receivers. In an embodiment of the present...
US-6,762,505 150 degree bump placement layout for an integrated circuit power grid
A 150 degree bump placement layout for an integrated circuit power grid is provided. This layout improves integrated circuit performance and reliability and...
US-D492,957 Hand stamp
US-6,760,907 Code generation for a bytecode compiler
A method, system and apparatus for generating and optimizing native code in a runtime compiler from a group of bytecodes presented to the compiler. The compiler...
US-6,760,891 Simulator of dynamic circuit for silicon critical path debug
An abstract register transfer level (RTL) model that simulates behavior of a dynamic circuit is created. The model is built upon an existing RTL with another...
US-6,760,868 Diagnostic cage for testing redundant system controllers
A multiprocessor system is disclosed that employs an apparatus and method for caging a redundant component to allow testing of the redundant component without...
US-6,760,815 Caching mechanism for a virtual heap
A caching mechanism for a virtual persistent heap is described. A feature of a virtual persistent heap is the method used to cache portions of the virtual...
US-6,760,786 Multiprocessing system configured to perform efficient block copy operations
A computer system optimized for block copy operations is provided. In order to perform a block copy from a remote source block to a local destination block, a...
US-6,760,736 Methods and systems for distributed failure detection and recovery using leasing techniques
A system for using a lease to detect a failure and to perform failure recovery is provided in using this system, a client requests a lease from a server to...
US-6,760,637 Method for interconnecting modular computer system components
A method capable of interconnecting modular computer system components includes attaching a secondary chassis to a primary chassis, attaching a motherboard to an...
US-6,760,442 Method and apparatus for adjusting the quality of digital media
A method and system are disclosed for adjusting the resolution or performance of digital media in a reversible manner. A mask component having a length of a...
US-6,760,330 Community separation control in a multi-community node
A method and mechanism of enforcing, in a computer network, a community separation policy wherein the data of a particular user community should be accessible...
US-6,760,232 Power distribution system having a dedicated power structure with apertures for mounting integrated circuit...
A system and method for distributing power to an integrated circuit. In one embodiment, a power laminate may be mounted to a printed circuit board (PCB). The...
US-6,760,075 Method and apparatus for seamless integration of multiple video projectors
Method and apparatus are provided for seamless integration of multiple video projectors. In addition to edge blending, projection artifacts in dark or black...
US-6,760,019 Methods and apparatus for facilitating the sharing of computer graphics operations
Methods and apparatus for facilitating the sharing of graphics rendering operation implementations between different pixel formats. A lookup table is generated...
US-6,759,901 Dynamic sensing regulator
A dynamic sensor regulator that provides a mechanism for introducing desirable tonal artifacts in component-based guitar amplifier systems by inducing voltage...
US-6,759,877 Dynamic circuitry with on-chip temperature-controlled keeper device
A method and apparatus that dynamically control an amount of offset current generated by a keeper device are provided. Further, a method and apparatus that use a...
US-6,759,768 Repeater methods for constrained pitch wire buses on integrated circuits
Methods and devices for implementing repeaters in integrated circuit wire buses having a pre-determined wire pitch, such as a minimum wire pitch, are described....
US-6,757,890 Methods and apparatus for enabling local Java object allocation and collection
Methods and apparatus for identifying objects to enable memory associated with the identified objects to be reclaimed are disclosed. One or more objects are...
US-6,757,843 Method and apparatus for using ranking to select repair nodes in formation of a dynamic tree for multicast repair
An embodiment consistent with the present invention includes a method and apparatus for forming a multicast repair tree. The methods perform by a data processor...
US-6,757,836 Method and apparatus for resolving partial connectivity in a clustered computing system
Improved techniques for resolving partial connectivity in clustered computing systems are disclosed. The improved techniques allow for detection of one or more...
US-6,757,831 Logic block used to check instruction buffer configuration
A CPU is provided with an ability to modify its operation in accordance with an encryption key. When a program is compiled, the program is modified in order that...
US-6,757,820 Decompression bit processing with a general purpose alignment tool
A method and apparatus for performing single-instruction bit field extraction and for counting a number of leading zeros in a sequence of bits on a general...
US-6,757,807 Explicitly clustered register file and execution unit architecture
A processor comprising a new architectural feature called a Register Domain, where a Register Domain has a register file, at least one execution unit, and...
US-6,757,733 Apparatus and method for improving performance of proxy server arrays that use persistent connections
A method and apparatus that ensures that requests for pages in a particular domain name are routed to the same proxy server by all of a plurality of clients. If,...
US-6,757,720 Profile service architecture
A mechanism for managing a plurality of profile data structures where each profile data structure comprising a hierarchical structure of attributes. The...
US-6,756,824 Self-biased driver amplifiers for high-speed signaling interfaces
Disclosed are novel methods and apparatus for efficiently providing self-biased driver amplifiers for high-speed signaling interfaces. In an embodiment of the...
US-D492,359 Memo holder with display
US-6,754,898 Method and apparatus for converting a lightweight monitor to a heavyweight monitor
Methods and apparatus for converting a lightweight monitor to a heavyweight monitor are disclosed. According to one aspect of the present invention, a ...
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